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2018-04-11use SPDX tag for RehiveTech copyright filesJan Viktorin
Replace the BSD license header with the SPDX tag for files with only an RehiveTech copyright on them. Signed-off-by: Jan Viktorin <viktorin@rehivetech.com> Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-01-09mk: use SPDX tag for Cavium copyright filesJerin Jacob
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-01-04mk: use SPDX tag for Intel copyright filesBruce Richardson
Replace the BSD license header with the SPDX tag for Makefiles with only an Intel copyright on them. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2017-07-08update Cavium Inc copyright headersJerin Jacob
Replace the incorrect reference to "Cavium Networks", "Cavium Ltd" company name with correct the "Cavium, Inc" company name in copyright headers. Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-06-14fix typos using codespell utilityJerin Jacob
Fixing typos across dpdk source code using codespell utility. Skipped the ethdev driver's base code fixes to keep the base code intact. Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Acked-by: John McNamara <john.mcnamara@intel.com>
2017-03-15remove unmaintained TILE-Gx architectureThomas Monjalon
The TILE-Gx architecture and its driver mpipe are not maintained. The code is removed to avoid confusion. A last update has been done in 17.05 before removal. It can be built with the updated toolchain: http://www.mellanox.com/repository/solutions/tile-scm/ and libgxio: http://www.mellanox.com/repository/solutions/tile-scm/libgxio-1.0.tar.xz Quote from http://dpdk.org/ml/archives/dev/2017-February/057940.html " Mellanox agrees to remove TILE-Gx support from DPDK.org, but will continue to support customers using DPDK. Customer that needs support should contact Mellanox directly. " Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-02-27tile: fix buildChris Metcalf
Re-enable CONFIG_RTE_LIBRTE_SCHED, since it is needed to build correctly. Fix a few warnings when compiling mpipe_tilegx.c. Remove an empty rte_cpu_feature_table[] array using a bogus type. Properly set RTE_OBJCOPY_{TARGET,ARCH} in mk/arch/tile/rte.vars.mk. Signed-off-by: Chris Metcalf <cmetcalf@mellanox.com>
2016-06-15mk: define objcopy target and arch on IBM POWERChao Zhu
This patch defines the target and arch value of objcopy program for IBM POWER PPC64 little endian architecture. Fixes: 99d6231fdca7 ("mk: define objcopy-specific target and arch") Signed-off-by: Chao Zhu <chaozhu@linux.vnet.ibm.com>
2016-06-13mk: define objcopy-specific target and archJan Viktorin
The program objcopy uses non-standard conventions to name the target and arch. Define the values for supported architectures (tile and ppc_64 are missing). Signed-off-by: Jan Viktorin <viktorin@rehivetech.com>
2016-03-16mk: support native build on TILE-GxLiming Sun
The CROSS variable has empty default value (for native) and must be set when using a cross-toolchain. Signed-off-by: Liming Sun <lsun@ezchip.com> Acked-by: Zhigang Lu <zlu@ezchip.com>
2016-02-11config: clean cache line size selection schemeJerin Jacob
by default, all the targets will be configured with the 64-byte cache line size, targets which have different cache line size can be overridden through target specific config file. Selected ThunderX and power8 as CONFIG_RTE_CACHE_LINE_SIZE=128 targets based on existing configuration. Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2015-11-18mk: introduce ARMv8 architectureJerin Jacob
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2015-11-18mk: introduce ARMv7 architectureVlastimil Kosar
Make DPDK run on ARMv7-A architecture. This patch assumes ARM Cortex-A9. However, it is known to be working on Cortex-A7 and Cortex-A15. Signed-off-by: Vlastimil Kosar <kosar@rehivetech.com> Signed-off-by: Jan Viktorin <viktorin@rehivetech.com> Acked-by: David Marchand <david.marchand@6wind.com>
2015-07-13eal/tile: add initial TILE-Gx supportCyril Chemparathy
This commit adds support for the TILE-Gx platform, as well as the TILE CPU architecture. This architecture port is fairly simple due to its reliance on generics for most arch stuff. Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com> Signed-off-by: Zhigang Lu <zlu@ezchip.com>
2015-02-18mk: support x32 ABIDaniel Mrzyglod
x32 ABI provides benefits of x86-64 while using 32-bit pointers and avoiding overhead of 64-bit pointers. Test report: http://dpdk.org/ml/archives/dev/2015-February/012599.html Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Signed-off-by: Daniel Mrzyglod <danielx.t.mrzyglod@intel.com> Tested-by: Haifeng Tang <haifengx.tang@intel.com> Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2014-11-27add prefix to cache line macrosSergio Gonzalez Monroy
CACHE_LINE_SIZE is a macro defined in machine/param.h in FreeBSD and conflicts with DPDK macro version. Adding RTE_ prefix to avoid conflicts. CACHE_LINE_MASK and CACHE_LINE_ROUNDUP are also prefixed. Signed-off-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com> [Thomas: updated on HEAD, including PPC]
2014-11-26mk: define cache size for IBM PowerChao Zhu
IBM Power architecture has different cache line size (128 bytes) than x86 (64 bytes). This patch defines CACHE_LINE_SIZE to 128 bytes to override the default value 64 bytes to support IBM Power Architecture. Signed-off-by: Chao Zhu <chaozhu@linux.vnet.ibm.com> Acked-by: David Marchand <david.marchand@6wind.com>
2014-11-26mk: introduce IBM Power architectureChao Zhu
To make DPDK run on IBM Power architecture, configuration files for Power architecuture are added. Also, the compiling related .mk files are added. Signed-off-by: Chao Zhu <chaozhu@linux.vnet.ibm.com> Acked-by: David Marchand <david.marchand@6wind.com>
2014-11-05eal: factorize x86 headersDavid Marchand
No need to keep the same code duplicated for 32 and 64bits x86. Signed-off-by: David Marchand <david.marchand@6wind.com> Acked-by: Chao Zhu <bjzhuc@cn.ibm.com> Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2014-06-11remove trailing whitespacesBruce Richardson
This commit removes trailing whitespace from lines in files. Almost all files are affected, as the BSD license copyright header had trailing whitespace on 4 lines in it [hence the number of files reporting 8 lines changed in the diffstat]. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> [Thomas: remove spaces before tabs in libs] [Thomas: remove more trailing spaces in non-C files] Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2014-02-25add FreeBSD supportBruce Richardson
Changes to allow compilation and use on FreeBSD. Includes: * contigmem and nic_uio driver for FreeBSD * new EAL instance * new "bsdapp" compilation target * various compilation fixes due to differences between linux and freebsd Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2014-02-25update Intel copyright years to 2014Bruce Richardson
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2013-10-09doc: whitespace changes in licensesIntel
Signed-off-by: Intel
2013-07-25update copyright date to 2013Intel
Signed-off-by: Intel
2013-07-25mk: fix typo in LDFLAGS for 32-bitThierry Herbelot
Enable compilation for 32-bit architecture. Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com> Acked-by: Ivan Boule <ivan.boule@6wind.com>
2013-07-05remove version in all filesIntel
Signed-off-by: Intel
2013-03-11first public releaseIntel
version 1.2.3 Signed-off-by: Intel