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path: root/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
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2019-02-13net/mlx5: fix Tx metadata for multi-segment packetDekel Peled
Original patch implemented the use of match_metadata offload in the different burst functions. The concurrent use of match_metadata and multi_segs offloads was not handled. This patch updates function txq_scatter_v(), to pass metadata value from mbuf to wqe, when indicated by offload flags. Fixes: 6bd7fbd03c62 ("net/mlx5: support metadata as flow rule criteria") Cc: stable@dpdk.org Signed-off-by: Dekel Peled <dekelp@mellanox.com> Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-11-16net/mlx5: optimize Rx buffer replenishment thresholdYongseok Koh
Due to redundant calculation per every burst, performance drops a little. Fixes: e10245a13b2e ("net/mlx5: fix Rx buffer replenishment threshold") Cc: stable@dpdk.org Signed-off-by: Yongseok Koh <yskoh@mellanox.com> Acked-by: Shahaf Shuler <shahafs@mellanox.com>
2018-10-26net/mlx5: support metadata as flow rule criteriaDekel Peled
As described in series starting at [1], it adds option to set metadata value as match pattern when creating a new flow rule. This patch adds metadata support in mlx5 driver, in two parts: - Add the validation and setting of metadata value in matcher, when creating a new flow rule. - Add the passing of metadata value from mbuf to wqe when indicated by ol_flag, in different burst functions. [1] "ethdev: support metadata as flow rule criteria" http://mails.dpdk.org/archives/dev/2018-September/113269.html Signed-off-by: Dekel Peled <dekelp@mellanox.com> Acked-by: Shahaf Shuler <shahafs@mellanox.com>
2018-07-26net/mlx5: fix assert for Tx completion queue countYongseok Koh
There should be at least one Tx CQE remained if Tx WQ and txq->elts[] have available slots to send a packet because the size of Tx CQ is exactly calculated from the size of other resources. As it is guaranteed, it is checked by an assertion. max_elts is checked after the assertion for Tx CQ. If no slot is available in txq->elts[], the assertion would be wrong. Fixes: 2eefbec531c7 ("net/mlx5: add missing sanity checks for Tx completion queue") Fixes: 6ce84bd88919 ("net/mlx5: add enhanced multi-packet send for ConnectX-5") Cc: stable@dpdk.org Signed-off-by: Yongseok Koh <yskoh@mellanox.com> Acked-by: Xueming Li <xuemingl@mellanox.com>
2018-07-03net/mlx5: fix Rx buffer replenishment thresholdYongseok Koh
The threshold of buffer replenishment for vectorized Rx burst is a constant value (64). If the size of Rx queue is comparatively small, device could run out of buffers. For example, if the size of Rx queue is 128, buffers are replenished only twice per a wraparound. This can cause jitter in receiving packets and the jitter can cause unnecessary retransmission for TCP connections. Fixes: 6cb559d67b83 ("net/mlx5: add vectorized Rx/Tx burst for x86") Fixes: 570acdb1da8a ("net/mlx5: add vectorized Rx/Tx burst for ARM") Cc: stable@dpdk.org Signed-off-by: Yongseok Koh <yskoh@mellanox.com> Acked-by: Shahaf Shuler <shahafs@mellanox.com>
2018-05-21net/mlx5: fix build with clang on ARMGavin Hu
This patch adds a pair of "()" to embrace the argument input to the function-like macro invocation. drivers/net/mlx5/mlx5_rxtx_vec.c:37: drivers/net/mlx5/mlx5_rxtx_vec_neon.h:170:24: error: too many arguments provided to function-like macro invocation (uint16x8_t) { 0, 0, cs_flags, rte_cpu_to_be_16(len), Fixes: 570acdb1da ("net/mlx5: add vectorized Rx/Tx burst for ARM") Cc: stable@dpdk.org Signed-off-by: Gavin Hu <gavin.hu@arm.com> Signed-off-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-04-27net/mlx5: support Rx tunnel type identificationXueming Li
This patch introduced tunnel type identification based on flow rules. If flows of multiple tunnel types built on same queue, no tunnel type will be returned. User application could use bits in flow mark as tunnel type identifier. Signed-off-by: Xueming Li <xuemingl@mellanox.com> Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2018-04-27net/mlx5: support generic tunnel offloadingXueming Li
This commit adds support for generic tunnel TSO and checksum offload. PMD will compute the inner/outer headers offset according to the mbuf fields. Hardware will do calculation based on offsets and types. Signed-off-by: Xueming Li <xuemingl@mellanox.com> Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-04-11align SPDX Mellanox copyrightsShahaf Shuler
Aligning Mellanox SPDX copyrights to a single format. In addition replace to SPDX licence files which were missed. Signed-off-by: Shahaf Shuler <shahafs@mellanox.com> Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2018-02-01net/mlx5: use SPDX tags in 6WIND copyrighted filesOlivier Matz
Signed-off-by: Olivier Matz <olivier.matz@6wind.com> Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2018-01-28net/mlx5: fix synchronization on polling Rx completionsYongseok Koh
Polling a new packet is basically sensing the generation bit in a completion entry. For some processors not having strongly-ordered memory model, there has to be a memory barrier between reading the generation bit and other fields of the entry in order to guarantee data is not stale. Fixes: 570acdb1da8a ("net/mlx5: add vectorized Rx/Tx burst for ARM") Cc: stable@dpdk.org Signed-off-by: Yongseok Koh <yskoh@mellanox.com> Acked-by: Shahaf Shuler <shahafs@mellanox.com> Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2018-01-16net/mlx5: fix calculation of flow ID flagYongseok Koh
PKT_RX_FDIR_ID should be set only if flow_tag is neither non-zero nor MLX5_FLOW_MARK_DEFAULT. Fixes: 6cb559d67b83 ("net/mlx5: add vectorized Rx/Tx burst for x86") Fixes: 570acdb1da8a ("net/mlx5: add vectorized Rx/Tx burst for ARM") Cc: stable@dpdk.org Reported-by: Xueming Li <xuemingl@mellanox.com> Signed-off-by: Yongseok Koh <yskoh@mellanox.com> Acked-by: Xueming Li <xuemingl@mellanox.com>
2018-01-16net/mlx5: fix overwriting bit-fields in SW Rx queueYongseok Koh
Bit-fields in mlx5_rxq_data can be changed on the fly by a control plane - e.g. rxq->mark. However, vectorized Rx uses a bit-field to mark pending errors. Even if one bit is written, consequence is to write the whole integer and this can cause a synchronization issue - two entities write to a same block without locking. As the pending_err bit is entirely internal use for the datapath, this can be replaced with a local variable. Fixes: 6cb559d67b83 ("net/mlx5: add vectorized Rx/Tx burst for x86") Fixes: 570acdb1da8a ("net/mlx5: add vectorized Rx/Tx burst for ARM") Cc: stable@dpdk.org Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
2018-01-16net/mlx5: add fallback in Tx for multi-segment packetYongseok Koh
mlx5_tx_burst_empw() falls back to legacy Tx descriptor for multi-segmented packets without taking advantage of inlining. In many cases, the 1st segment can be inlined and this could make device fetch only one segment instead of two. This helps saving PCIe bandwidth when transmitting out multi-segmented packets with still using the Enhanced Multi-Packet Send for other packets. Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
2018-01-16net/mlx5: add missing sanity checks for Tx completion queueYongseok Koh
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
2018-01-16net/mlx5: fix Tx checksum offloadsNĂ©lio Laranjeiro
Tx checksum offloads are correctly handled in a single Tx burst function whereas the capability is always set. This causes VXLAN packet with checksum offloads request to be ignored when the (E)MPS Tx functions are selected. Fixes: f5fde5205101 ("net/mlx5: add hardware checksum offload for tunnel packets") Cc: stable@dpdk.org Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com> Acked-by: Yongseok Koh <yskoh@mellanox.com>
2017-11-04net/mlx5: fix some typosThomas Monjalon
Fixes: 570acdb1da8a ("net/mlx5: add vectorized Rx/Tx burst for ARM") Fixes: 3c2ddbd413e3 ("net/mlx5: separate shareable vector functions") Fixes: f8b9a3bad467 ("net/mlx5: install a socket to exchange a file descriptor") Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2017-10-26net/mlx5: fix Tx doorbell memory barrierYongseok Koh
Configuring UAR as IO-mapped makes maximum throughput decline by noticeable amount. If UAR is configured as write-combining register, a write memory barrier is needed on ringing a doorbell. rte_wmb() is mostly effective when the size of a burst is comparatively small. Revert the register back to write-combining and enforce a write memory barrier instead, except for vectorized Tx burst routines. Application can change it by setting MLX5_SHUT_UP_BF under its own necessity. Fixes: 9f9bebae5530 ("net/mlx5: don't map doorbell register to write combining") Signed-off-by: Yongseok Koh <yskoh@mellanox.com> Acked-by: Shahaf Shuler <shahafs@mellanox.com> Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2017-10-26mbuf: rename deprecated VLAN flagsOlivier Matz
PKT_RX_VLAN_PKT and PKT_RX_QINQ_PKT are deprecated for a while. As explained in [1], these flags were kept to let the applications and PMDs move to the new flag. There is also a need to support Rx vlan offload without vlan strip (at least for the ixgbe driver). This patch renames the old flags for this feature, knowing that some PMDs were using PKT_RX_VLAN_PKT and PKT_RX_QINQ_PKT to indicate that the vlan tci has been saved in the mbuf structure. It is likely that some PMDs do not set the proper flags when doing vlan offload, and it would be worth making a pass on all of them. Link: [1] http://dpdk.org/ml/archives/dev/2017-June/067712.html Signed-off-by: Olivier Matz <olivier.matz@6wind.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2017-10-12net/mlx5: add Rx HW timestampRaslan Darawsheh
Expose Rx HW timestamp to packet mbufs. Signed-off-by: Raslan Darawsheh <rasland@mellanox.com> Acked-by: Yongseok Koh <yskoh@mellanox.com>
2017-10-12net/mlx5: fix deadlock due to buffered slots in Rx SW ringYongseok Koh
When replenishing Rx ring, there're always buffered slots reserved between consumed entries and HW owned entries. These have to be filled with fake mbufs to protect from possible overflow rather than optimistically expecting successful replenishment which can cause deadlock with small-sized queue. Fixes: fc048bd52cb7 ("net/mlx5: fix overflow of Rx SW ring") Cc: stable@dpdk.org Reported-by: Martin Weiser <martin.weiser@allegro-packets.com> Signed-off-by: Yongseok Koh <yskoh@mellanox.com> Tested-by: Martin Weiser <martin.weiser@allegro-packets.com>
2017-10-12net/mlx5: add vectorized Rx/Tx burst for ARMYongseok Koh
Brings vectorization through NEON instructions. Signed-off-by: Yongseok Koh <yskoh@mellanox.com> Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>