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authorKevin Laatz <kevin.laatz@intel.com>2018-01-12 10:48:44 +0000
committerThomas Monjalon <thomas@monjalon.net>2018-02-01 00:10:42 +0100
commit867a6c66ecf3d88e76367254e79bb9e7b936a830 (patch)
tree6dfff0dc52b5b91554b8565f8557838abd9066be /examples/ipsec-secgw
parent6c74ddeddf92d9937b13e6cf94ab828cb1cee476 (diff)
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examples: increase default ring sizes to 1024
Increase the default RX/TX ring sizes to 1024/1024 to accommodate for NICs with higher throughput (25G, 40G etc) Signed-off-by: Kevin Laatz <kevin.laatz@intel.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Diffstat (limited to 'examples/ipsec-secgw')
-rw-r--r--examples/ipsec-secgw/ipsec-secgw.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/examples/ipsec-secgw/ipsec-secgw.c b/examples/ipsec-secgw/ipsec-secgw.c
index c67f79d..3a8562e 100644
--- a/examples/ipsec-secgw/ipsec-secgw.c
+++ b/examples/ipsec-secgw/ipsec-secgw.c
@@ -78,8 +78,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
-#define IPSEC_SECGW_RX_DESC_DEFAULT 128
-#define IPSEC_SECGW_TX_DESC_DEFAULT 512
+#define IPSEC_SECGW_RX_DESC_DEFAULT 1024
+#define IPSEC_SECGW_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = IPSEC_SECGW_RX_DESC_DEFAULT;
static uint16_t nb_txd = IPSEC_SECGW_TX_DESC_DEFAULT;