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authorNatalie Samsonov <nsamsono@marvell.com>2018-08-24 20:30:03 +0200
committerFerruh Yigit <ferruh.yigit@intel.com>2018-08-28 15:27:39 +0200
commit4943a290b8956f5ccb56a4a64205b60dc09646ca (patch)
treee23fd88807c80fa58152bbb77e5bb9349aa7887c /drivers/net/mvpp2
parent61940700f5e2ee3b54f2aa8d1137ce7d33cccbc3 (diff)
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net/mvpp2: support VLAN for parser offload
Add VLAN packet type support for parser offload. Signed-off-by: Natalie Samsonov <nsamsono@marvell.com> Reviewed-by: Shlomi Gridish <sgridish@marvell.com> Reviewed-by: Dmitri Epshtein <dima@marvell.com> Reviewed-by: Yuval Caduri <cyuval@marvell.com>
Diffstat (limited to 'drivers/net/mvpp2')
-rw-r--r--drivers/net/mvpp2/mrvl_ethdev.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 6f18315..6824445 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -1353,6 +1353,8 @@ mrvl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
{
static const uint32_t ptypes[] = {
RTE_PTYPE_L2_ETHER,
+ RTE_PTYPE_L2_ETHER_VLAN,
+ RTE_PTYPE_L2_ETHER_QINQ,
RTE_PTYPE_L3_IPV4,
RTE_PTYPE_L3_IPV4_EXT,
RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
@@ -1922,13 +1924,27 @@ mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc *desc,
{
enum pp2_inq_l3_type l3_type;
enum pp2_inq_l4_type l4_type;
+ enum pp2_inq_vlan_tag vlan_tag;
uint64_t packet_type;
pp2_ppio_inq_desc_get_l3_info(desc, &l3_type, l3_offset);
pp2_ppio_inq_desc_get_l4_info(desc, &l4_type, l4_offset);
+ pp2_ppio_inq_desc_get_vlan_tag(desc, &vlan_tag);
packet_type = RTE_PTYPE_L2_ETHER;
+ switch (vlan_tag) {
+ case PP2_INQ_VLAN_TAG_SINGLE:
+ packet_type |= RTE_PTYPE_L2_ETHER_VLAN;
+ break;
+ case PP2_INQ_VLAN_TAG_DOUBLE:
+ case PP2_INQ_VLAN_TAG_TRIPLE:
+ packet_type |= RTE_PTYPE_L2_ETHER_QINQ;
+ break;
+ default:
+ break;
+ }
+
switch (l3_type) {
case PP2_INQ_L3_TYPE_IPV4_NO_OPTS:
packet_type |= RTE_PTYPE_L3_IPV4;