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authorYongseok Koh <yskoh@mellanox.com>2018-05-08 11:48:19 -0700
committerFerruh Yigit <ferruh.yigit@intel.com>2018-05-14 22:31:50 +0100
commit95d7e115be89f071d672d9cfd5c0eb1b23fce5fc (patch)
tree0d7f05e0f5f105d9524490c41f90f83442f009c4 /drivers/net/mlx5/mlx5_txq.c
parent690de2850b26466ad5325fde3e1aff040e3868f8 (diff)
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net/mlx5: fix calculation of Tx TSO inline room size
rdma-core doesn't add up max_tso_header size to max_inline_data size. The library takes bigger value between the two. Fixes: 43e9d9794cde ("net/mlx5: support upstream rdma-core") Cc: stable@dpdk.org Signed-off-by: Yongseok Koh <yskoh@mellanox.com> Acked-by: Shahaf Shuler <shahafs@mellanox.com>
Diffstat (limited to 'drivers/net/mlx5/mlx5_txq.c')
-rw-r--r--drivers/net/mlx5/mlx5_txq.c12
1 files changed, 0 insertions, 12 deletions
diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
index 19c883d..e05d1a0 100644
--- a/drivers/net/mlx5/mlx5_txq.c
+++ b/drivers/net/mlx5/mlx5_txq.c
@@ -725,18 +725,6 @@ txq_set_params(struct mlx5_txq_ctrl *txq_ctrl)
inline_max_packet_sz) +
(RTE_CACHE_LINE_SIZE - 1)) /
RTE_CACHE_LINE_SIZE) * RTE_CACHE_LINE_SIZE;
- } else if (tso) {
- int inline_diff = txq_ctrl->txq.max_inline -
- max_tso_inline;
-
- /*
- * Adjust inline value as Verbs aggregates
- * tso_inline and txq_inline fields.
- */
- txq_ctrl->max_inline_data = inline_diff > 0 ?
- inline_diff *
- RTE_CACHE_LINE_SIZE :
- 0;
} else {
txq_ctrl->max_inline_data =
txq_ctrl->txq.max_inline * RTE_CACHE_LINE_SIZE;