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authorXiaoyun Li <xiaoyun.li@intel.com>2018-09-17 17:28:13 +0800
committerFerruh Yigit <ferruh.yigit@intel.com>2018-09-28 01:41:02 +0200
commit36a036bc6fdd0da74576a39ab74e50954598ba82 (patch)
tree6a579fd8f24279e9efa89f5e87dc590c8d906436 /drivers/net/ixgbe
parent175bedb0cc8f801be3050fa35b8d8d0971cea7cc (diff)
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net/ixgbe/base: support DCB registers dump
Add support for DCB registers dump. Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Diffstat (limited to 'drivers/net/ixgbe')
-rw-r--r--drivers/net/ixgbe/base/ixgbe_type.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index ea34bb9..cee6ba2 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -850,6 +850,10 @@ struct ixgbe_dmac_config {
#define IXGBE_RTTDQSEL 0x04904
#define IXGBE_RTTDT1C 0x04908
#define IXGBE_RTTDT1S 0x0490C
+#define IXGBE_RTTQCNCR 0x08B00
+#define IXGBE_RTTQCNTG 0x04A90
+#define IXGBE_RTTBCNRD 0x0498C
+#define IXGBE_RTTQCNRR 0x0498C
#define IXGBE_RTTDTECC 0x04990
#define IXGBE_RTTDTECC_NO_BCN 0x00000100
@@ -860,6 +864,7 @@ struct ixgbe_dmac_config {
#define IXGBE_RTTBCNRC_RF_INT_MASK \
(IXGBE_RTTBCNRC_RF_DEC_MASK << IXGBE_RTTBCNRC_RF_INT_SHIFT)
#define IXGBE_RTTBCNRM 0x04980
+#define IXGBE_RTTQCNRM 0x04980
/* BCN (for DCB) Registers */
#define IXGBE_RTTBCNRS 0x04988