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authorWenzhuo Lu <wenzhuo.lu@intel.com>2019-03-26 14:16:51 +0800
committerFerruh Yigit <ferruh.yigit@intel.com>2019-03-29 17:25:31 +0100
commit2d5f6953d56d13a6cea916d5d8384bfc07041991 (patch)
tree17574c6ae06688e0808072e32827094ac6803716 /doc
parenta1cdb4f884730204b89feec394de801badf47847 (diff)
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net/ice: support vector AVX2 in Tx
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Diffstat (limited to 'doc')
-rw-r--r--doc/guides/nics/ice.rst18
-rw-r--r--doc/guides/rel_notes/release_19_05.rst4
2 files changed, 22 insertions, 0 deletions
diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst
index 3998d5e..fdbc02e 100644
--- a/doc/guides/nics/ice.rst
+++ b/doc/guides/nics/ice.rst
@@ -64,6 +64,24 @@ Driver compilation and testing
Refer to the document :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>`
for details.
+Features
+--------
+
+Vector PMD
+~~~~~~~~~~
+
+Vector PMD for RX and TX path are selected automatically. The paths
+are chosen based on 2 conditions.
+
+- ``CPU``
+ On the X86 platform, the driver checks if the CPU supports AVX2.
+ If it's supported, AVX2 paths will be chosen. If not, SSE is chosen.
+
+- ``Offload features``
+ The supported HW offload features are described in the document ice_vec.ini.
+ If any not supported features are used, ICE vector PMD is disabled and the
+ normal paths are chosen.
+
Sample Application Notes
------------------------
diff --git a/doc/guides/rel_notes/release_19_05.rst b/doc/guides/rel_notes/release_19_05.rst
index 8613282..ac6db18 100644
--- a/doc/guides/rel_notes/release_19_05.rst
+++ b/doc/guides/rel_notes/release_19_05.rst
@@ -100,6 +100,10 @@ New Features
* Added promiscuous mode support.
+* **Updated the ice driver.**
+
+ * Added support of SSE and AVX2 instructions in Rx and Tx paths.
+
* **Updated the QuickAssist Technology PMD.**
Added support for AES-XTS with 128 and 256 bit AES keys.