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authorMatan Azrad <matan@mellanox.com>2019-07-29 11:53:26 +0000
committerFerruh Yigit <ferruh.yigit@intel.com>2019-07-29 16:54:27 +0200
commit18a68e046b511a1fc2424f20387332990bc7338b (patch)
treef3fdabe381bc4f62ffb5c0ba5ef3f8ef65cf76e7
parentbd41389e35ee3ed29cdee851efc8433f151e5928 (diff)
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net/mlx5: fix DevX Rx queue memory alignment
The alignment requested by the FW for WQ buffer allocation is 512. Change it from cache line alignment to 512. Fixes: dc9ceff73c99 ("net/mlx5: create advanced RxQ via DevX") Signed-off-by: Matan Azrad <matan@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
-rw-r--r--drivers/net/mlx5/mlx5_prm.h3
-rw-r--r--drivers/net/mlx5/mlx5_rxq.c2
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h
index 6ea6345..42ead7d 100644
--- a/drivers/net/mlx5/mlx5_prm.h
+++ b/drivers/net/mlx5/mlx5_prm.h
@@ -240,6 +240,9 @@
/* The maximum log value of segments per RQ WQE. */
#define MLX5_MAX_LOG_RQ_SEGS 5u
+/* The alignment needed for WQ buffer. */
+#define MLX5_WQE_BUF_ALIGNMENT 512
+
/* Completion mode. */
enum mlx5_completion_mode {
MLX5_COMP_ONLY_ERR = 0x0,
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index ad5b0a9..e96bb1e 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -1126,7 +1126,7 @@ mlx5_devx_rq_new(struct rte_eth_dev *dev, uint16_t idx, uint32_t cqn)
/* Calculate and allocate WQ memory space. */
wqe_size = 1 << log_wqe_size; /* round up power of two.*/
wq_size = wqe_n * wqe_size;
- buf = rte_calloc_socket(__func__, 1, wq_size, RTE_CACHE_LINE_SIZE,
+ buf = rte_calloc_socket(__func__, 1, wq_size, MLX5_WQE_BUF_ALIGNMENT,
rxq_ctrl->socket);
if (!buf)
return NULL;