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authorArek Kusztal <arkadiuszx.kusztal@intel.com>2019-03-28 14:37:01 +0100
committerAkhil Goyal <akhil.goyal@nxp.com>2019-04-02 16:50:24 +0200
commitf81cbc208fd0b18f48d1d7eaa6445a269e253c8d (patch)
tree0c8d56cc889ef4bd7585ae3a91438721f801e9e0 /doc
parent0adc033f58fe5df4c4b2768ecf5020f513611d96 (diff)
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crypto/qat: add asymmetric crypto PMD
This patch adds Poll Mode Driver for asymmetric crypto functions of Intel QuickAssist Technology hardware. It contains plain driver with no functions implemented, specific algorithms will be introduced in separate patches. This patch depends on a QAT PF driver for device initialization. See the file docs/guides/cryptodevs/qat.rst for configuration details. Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Diffstat (limited to 'doc')
-rw-r--r--doc/guides/cryptodevs/qat.rst7
1 files changed, 7 insertions, 0 deletions
diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index da9655c..f859383 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -101,7 +101,13 @@ of all the items described above, including the padding at the end.
Also, offset of data to authenticate "op.sym.auth.data.offset"
must be such that points at the start of the COUNT bytes.
+Asymmetric Crypto Service on QAT
+--------------------------------
+The QAT Asym PMD has support for:
+
+Limitations
+~~~~~~~~~~~
.. _building_qat:
@@ -112,6 +118,7 @@ A QAT device can host multiple acceleration services:
* symmetric cryptography
* data compression
+* asymmetric cryptography
These services are provided to DPDK applications via PMDs which register to
implement the corresponding cryptodev and compressdev APIs. The PMDs use