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authorFiona Trahe <fiona.trahe@intel.com>2019-05-03 17:15:40 +0100
committerThomas Monjalon <thomas@monjalon.net>2019-05-10 00:38:18 +0200
commitd9fa7bcc65d86887e40487e22a70c817aa4dfd3c (patch)
tree692a96b7262ce2306e64568f1ea786c0b32b61bd
parent84ba341cb03e920cdf087ecaa1dd21110dd81dcc (diff)
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doc: update release notes for QAT PMDs
Added release note entry for QAT compression PMD Clarified that previous entry was for QAT sym crypto PMD Signed-off-by: Fiona Trahe <fiona.trahe@intel.com> Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com> Acked-by: John McNamara <john.mcnamara@intel.com>
-rw-r--r--doc/guides/rel_notes/release_19_05.rst7
1 files changed, 6 insertions, 1 deletions
diff --git a/doc/guides/rel_notes/release_19_05.rst b/doc/guides/rel_notes/release_19_05.rst
index f4457ac..e0c58e9 100644
--- a/doc/guides/rel_notes/release_19_05.rst
+++ b/doc/guides/rel_notes/release_19_05.rst
@@ -186,7 +186,12 @@ New Features
Added MACSEC hardware offload experimental API.
-* **Updated the QuickAssist Technology PMD.**
+* **Updated the Intel QuickAssist Technology (QAT) compression PMD.**
+
+ Simplified and made more robust QAT compressdev PMD's handling of SGLs with
+ more than 16 segments.
+
+* **Updated the QuickAssist Technology (QAT) symmetric crypto PMD.**
Added support for AES-XTS with 128 and 256 bit AES keys.