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authorSunil Kumar Kori <skori@marvell.com>2019-11-12 14:32:27 +0530
committerFerruh Yigit <ferruh.yigit@intel.com>2019-11-20 17:36:05 +0100
commit53de676f8bfe3d4beca9ddd05538490ab273157d (patch)
treee016b02ab06a3eb97e34aa834a4598a609e99b3b /drivers
parent1bcec6ee08b4a2b7276da86323eb40da002ab421 (diff)
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net/octeontx2: add Rx/Tx burst mode info
Retrieve burst mode information according to the selected Rx/Tx mode and offloads. Signed-off-by: Sunil Kumar Kori <skori@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/octeontx2/otx2_ethdev.c2
-rw-r--r--drivers/net/octeontx2/otx2_ethdev.h4
-rw-r--r--drivers/net/octeontx2/otx2_ethdev_ops.c99
3 files changed, 105 insertions, 0 deletions
diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
index be6ff71..c3366de 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -2009,6 +2009,8 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.xstats_get_names_by_id = otx2_nix_xstats_get_names_by_id,
.rxq_info_get = otx2_nix_rxq_info_get,
.txq_info_get = otx2_nix_txq_info_get,
+ .rx_burst_mode_get = otx2_rx_burst_mode_get,
+ .tx_burst_mode_get = otx2_tx_burst_mode_get,
.rx_queue_count = otx2_nix_rx_queue_count,
.rx_descriptor_done = otx2_nix_rx_descriptor_done,
.rx_descriptor_status = otx2_nix_rx_descriptor_status,
diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
index ba66dbb..f366626 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -390,6 +390,10 @@ void otx2_nix_rxq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
struct rte_eth_rxq_info *qinfo);
void otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
struct rte_eth_txq_info *qinfo);
+int otx2_rx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id,
+ struct rte_eth_burst_mode *mode);
+int otx2_tx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id,
+ struct rte_eth_burst_mode *mode);
uint32_t otx2_nix_rx_queue_count(struct rte_eth_dev *eth_dev, uint16_t qidx);
int otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt);
int otx2_nix_rx_descriptor_done(void *rxq, uint16_t offset);
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c
index d1e77c3..d715f40 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -2,6 +2,7 @@
* Copyright(C) 2019 Marvell International Ltd.
*/
+#include <rte_ethdev.h>
#include <rte_mbuf_pool_ops.h>
#include "otx2_ethdev.h"
@@ -225,6 +226,104 @@ otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
qinfo->conf.tx_deferred_start = 0;
}
+int
+otx2_rx_burst_mode_get(struct rte_eth_dev *eth_dev,
+ __rte_unused uint16_t queue_id,
+ struct rte_eth_burst_mode *mode)
+{
+ ssize_t bytes = 0, str_size = RTE_ETH_BURST_MODE_INFO_SIZE, rc;
+ struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+ const struct burst_info {
+ uint16_t flags;
+ const char *output;
+ } rx_offload_map[] = {
+ {NIX_RX_OFFLOAD_RSS_F, "RSS,"},
+ {NIX_RX_OFFLOAD_PTYPE_F, " Ptype,"},
+ {NIX_RX_OFFLOAD_CHECKSUM_F, " Checksum,"},
+ {NIX_RX_OFFLOAD_VLAN_STRIP_F, " VLAN Strip,"},
+ {NIX_RX_OFFLOAD_MARK_UPDATE_F, " Mark Update,"},
+ {NIX_RX_OFFLOAD_TSTAMP_F, " Timestamp,"},
+ {NIX_RX_MULTI_SEG_F, " Scattered,"}
+ };
+ static const char *const burst_mode[] = {"Vector Neon, Rx Offloads:",
+ "Scalar, Rx Offloads:"
+ };
+ uint32_t i;
+
+ /* Update burst mode info */
+ rc = rte_strscpy(mode->info + bytes, burst_mode[dev->scalar_ena],
+ str_size - bytes);
+ if (rc < 0)
+ goto done;
+
+ bytes += rc;
+
+ /* Update Rx offload info */
+ for (i = 0; i < RTE_DIM(rx_offload_map); i++) {
+ if (dev->rx_offload_flags & rx_offload_map[i].flags) {
+ rc = rte_strscpy(mode->info + bytes,
+ rx_offload_map[i].output,
+ str_size - bytes);
+ if (rc < 0)
+ goto done;
+
+ bytes += rc;
+ }
+ }
+
+done:
+ return 0;
+}
+
+int
+otx2_tx_burst_mode_get(struct rte_eth_dev *eth_dev,
+ __rte_unused uint16_t queue_id,
+ struct rte_eth_burst_mode *mode)
+{
+ ssize_t bytes = 0, str_size = RTE_ETH_BURST_MODE_INFO_SIZE, rc;
+ struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+ const struct burst_info {
+ uint16_t flags;
+ const char *output;
+ } tx_offload_map[] = {
+ {NIX_TX_OFFLOAD_L3_L4_CSUM_F, " Inner L3/L4 csum,"},
+ {NIX_TX_OFFLOAD_OL3_OL4_CSUM_F, " Outer L3/L4 csum,"},
+ {NIX_TX_OFFLOAD_VLAN_QINQ_F, " VLAN Insertion,"},
+ {NIX_TX_OFFLOAD_MBUF_NOFF_F, " MBUF free disable,"},
+ {NIX_TX_OFFLOAD_TSTAMP_F, " Timestamp,"},
+ {NIX_TX_OFFLOAD_TSO_F, " TSO,"},
+ {NIX_TX_MULTI_SEG_F, " Scattered,"}
+ };
+ static const char *const burst_mode[] = {"Vector Neon, Tx Offloads:",
+ "Scalar, Tx Offloads:"
+ };
+ uint32_t i;
+
+ /* Update burst mode info */
+ rc = rte_strscpy(mode->info + bytes, burst_mode[dev->scalar_ena],
+ str_size - bytes);
+ if (rc < 0)
+ goto done;
+
+ bytes += rc;
+
+ /* Update Tx offload info */
+ for (i = 0; i < RTE_DIM(tx_offload_map); i++) {
+ if (dev->tx_offload_flags & tx_offload_map[i].flags) {
+ rc = rte_strscpy(mode->info + bytes,
+ tx_offload_map[i].output,
+ str_size - bytes);
+ if (rc < 0)
+ goto done;
+
+ bytes += rc;
+ }
+ }
+
+done:
+ return 0;
+}
+
static void
nix_rx_head_tail_get(struct otx2_eth_dev *dev,
uint32_t *head, uint32_t *tail, uint16_t queue_idx)