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authorViacheslav Ovsiienko <viacheslavo@mellanox.com>2019-11-07 13:18:24 +0000
committerFerruh Yigit <ferruh.yigit@intel.com>2019-11-11 14:23:02 +0100
commit2d2c2efeda176962a9ba9b46a10d3f6bf8f30c48 (patch)
treeabdd1854737c82fc2669db4e889aeff6d0eda2fc /drivers/net/mlx5
parent02e76468180c21d2f15c768b73457ce00e3bd3f4 (diff)
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net/mlx5: fix asserts for multi-segment Tx offload misconfig
To support multi-segment packet sending the Tx datapath DEV_TX_OFFLOAD_MULTI_SEGS offload must be configured. In debug configuration the asserts arise if the multi-segment packet is being sent and no DEV_TX_OFFLOAD_MULTI_SEGS is set. It was found that in some execution paths asserts were missed, this patch adds ones. Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template") Cc: stable@dpdk.org Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com>
Diffstat (limited to 'drivers/net/mlx5')
-rw-r--r--drivers/net/mlx5/mlx5_rxtx.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index f28a909..8bc0542 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -3875,6 +3875,7 @@ mlx5_tx_burst_empw_simple(struct mlx5_txq_data *restrict txq,
unsigned int slen = 0;
next_empw:
+ assert(NB_SEGS(loc->mbuf) == 1);
part = RTE_MIN(pkts_n, MLX5_EMPW_MAX_PACKETS);
if (unlikely(loc->elts_free < part)) {
/* We have no enough elts to save all mbufs. */
@@ -3934,6 +3935,7 @@ next_empw:
return MLX5_TXCMP_CODE_EXIT;
return MLX5_TXCMP_CODE_MULTI;
}
+ assert(NB_SEGS(loc->mbuf) == 1);
if (ret == MLX5_TXCMP_CODE_TSO) {
part -= loop;
mlx5_tx_sdone_empw(txq, loc, part, slen, olx);
@@ -4033,6 +4035,7 @@ mlx5_tx_burst_empw_inline(struct mlx5_txq_data *restrict txq,
unsigned int room, part, nlim;
unsigned int slen = 0;
+ assert(NB_SEGS(loc->mbuf) == 1);
/*
* Limits the amount of packets in one WQE
* to improve CQE latency generation.
@@ -4173,6 +4176,7 @@ next_mbuf:
return MLX5_TXCMP_CODE_EXIT;
return MLX5_TXCMP_CODE_MULTI;
}
+ assert(NB_SEGS(loc->mbuf) == 1);
if (ret == MLX5_TXCMP_CODE_TSO) {
part -= room;
mlx5_tx_idone_empw(txq, loc, part, slen, olx);