summaryrefslogtreecommitdiff
path: root/drivers/net/mlx5/mlx5_prm.h
diff options
context:
space:
mode:
authorYongseok Koh <yskoh@mellanox.com>2017-03-15 16:55:44 -0700
committerFerruh Yigit <ferruh.yigit@intel.com>2017-04-04 18:59:41 +0200
commit6ce84bd889194b013fa597abcc6b8e00602dca58 (patch)
treecbc5201d4a56bf377176bd09812a3e6e23dc947c /drivers/net/mlx5/mlx5_prm.h
parentc2c6ddd51da4966bedc9b7146c967a37ad3e4ec5 (diff)
downloaddpdk-6ce84bd889194b013fa597abcc6b8e00602dca58.zip
dpdk-6ce84bd889194b013fa597abcc6b8e00602dca58.tar.gz
dpdk-6ce84bd889194b013fa597abcc6b8e00602dca58.tar.xz
net/mlx5: add enhanced multi-packet send for ConnectX-5
ConnectX-5 supports enhanced version of multi-packet send (MPS). An MPS Tx descriptor can carry multiple packets either by including pointers of packets or by inlining packets. Inlining packet data can be helpful to better utilize PCIe bandwidth. In addition, Enhanced MPS supports hybrid mode - mixing inlined packets and pointers in a descriptor. This feature is enabled by default if supported by HW. Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Diffstat (limited to 'drivers/net/mlx5/mlx5_prm.h')
-rw-r--r--drivers/net/mlx5/mlx5_prm.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h
index 0a77f5b..155bdba 100644
--- a/drivers/net/mlx5/mlx5_prm.h
+++ b/drivers/net/mlx5/mlx5_prm.h
@@ -73,6 +73,9 @@
/* WQE size */
#define MLX5_WQE_SIZE (4 * MLX5_WQE_DWORD_SIZE)
+/* Max size of a WQE session. */
+#define MLX5_WQE_SIZE_MAX 960U
+
/* Compute the number of DS. */
#define MLX5_WQE_DS(n) \
(((n) + MLX5_WQE_DWORD_SIZE - 1) / MLX5_WQE_DWORD_SIZE)
@@ -80,10 +83,19 @@
/* Room for inline data in multi-packet WQE. */
#define MLX5_MWQE64_INL_DATA 28
+/* Default minimum number of Tx queues for inlining packets. */
+#define MLX5_EMPW_MIN_TXQS 8
+
+/* Default max packet length to be inlined. */
+#define MLX5_EMPW_MAX_INLINE_LEN (4U * MLX5_WQE_SIZE)
+
#ifndef HAVE_VERBS_MLX5_OPCODE_TSO
#define MLX5_OPCODE_TSO MLX5_OPCODE_LSO_MPW /* Compat with OFED 3.3. */
#endif
+#define MLX5_OPC_MOD_ENHANCED_MPSW 0
+#define MLX5_OPCODE_ENHANCED_MPSW 0x29
+
/* CQE value to inform that VLAN is stripped. */
#define MLX5_CQE_VLAN_STRIPPED (1u << 0)
@@ -176,10 +188,18 @@ struct mlx5_wqe64 {
uint8_t raw[32];
} __rte_aligned(MLX5_WQE_SIZE);
+/* MPW mode. */
+enum mlx5_mpw_mode {
+ MLX5_MPW_DISABLED,
+ MLX5_MPW,
+ MLX5_MPW_ENHANCED, /* Enhanced Multi-Packet Send WQE, a.k.a MPWv2. */
+};
+
/* MPW session status. */
enum mlx5_mpw_state {
MLX5_MPW_STATE_OPENED,
MLX5_MPW_INL_STATE_OPENED,
+ MLX5_MPW_ENHANCED_STATE_OPENED,
MLX5_MPW_STATE_CLOSED,
};