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authorMatan Azrad <matan@mellanox.com>2019-07-16 14:34:56 +0000
committerFerruh Yigit <ferruh.yigit@intel.com>2019-07-23 14:31:35 +0200
commit31538ef62ceb23d8cb655b1598c7a6f2da2ab04c (patch)
tree951ace46fe9520a3415e4f8868c6550f0f9470ef /drivers/net/mlx5/mlx5.h
parentf15db67df09c1925e7d62a55931bf694e360d67a (diff)
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net/mlx5: allow basic counter management fallback
In case the asynchronous devx commands are not supported in RDMA core fallback to use a basic counter management. Here, the PMD counters cashe is redundant and the host thread doesn't update it. hence, each counter operation will go to the FW and the acceleration reduces. Signed-off-by: Matan Azrad <matan@mellanox.com> Acked-by: Shahaf Shuler <shahafs@mellanox.com>
Diffstat (limited to 'drivers/net/mlx5/mlx5.h')
-rw-r--r--drivers/net/mlx5/mlx5.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 4ce352a..2bd2aa6 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -168,6 +168,7 @@ struct mlx5_devx_mkey_attr {
/* HCA attributes. */
struct mlx5_hca_attr {
uint32_t eswitch_manager:1;
+ uint32_t flow_counters_dump:1;
uint8_t flow_counter_bulk_alloc_bitmap;
};
@@ -457,6 +458,7 @@ struct mlx5_priv {
unsigned int representor:1; /* Device is a port representor. */
unsigned int master:1; /* Device is a E-Switch master. */
unsigned int dr_shared:1; /* DV/DR data is shared. */
+ unsigned int counter_fallback:1; /* Use counter fallback management. */
uint16_t domain_id; /* Switch domain identifier. */
uint16_t vport_id; /* Associated VF vport index (if any). */
int32_t representor_id; /* Port representor identifier. */