path: root/doc
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authorGavin Hu <>2018-11-02 19:21:28 +0800
committerThomas Monjalon <>2018-11-05 14:34:27 +0100
commit047adc17245892198be31c54cf6658080df3dc6d (patch)
tree46f8b8b66fe903e31b16ae4cb7af79f087fec069 /doc
parent9ed877062898dd1eb7150bca56ebbd5329e96ee4 (diff)
ring/c11: move atomic load of head above the loop
In __rte_ring_move_prod_head, move the __atomic_load_n up and out of the do {} while loop as upon failure the old_head will be updated, another load is costly and not necessary. This helps a little on the latency,about 1~5%. Test result with the patch(two cores): SP/SC bulk enq/dequeue (size: 8): 5.64 MP/MC bulk enq/dequeue (size: 8): 9.58 SP/SC bulk enq/dequeue (size: 32): 1.98 MP/MC bulk enq/dequeue (size: 32): 2.30 Fixes: 39368ebfc606 ("ring: introduce C11 memory model barrier option") Cc: Signed-off-by: Gavin Hu <> Reviewed-by: Honnappa Nagarahalli <> Reviewed-by: Steve Capper <> Reviewed-by: Ola Liljedahl <> Reviewed-by: Jia He <> Acked-by: Jerin Jacob <> Tested-by: Jerin Jacob <> Acked-by: Olivier Matz <>
Diffstat (limited to 'doc')
1 files changed, 10 insertions, 0 deletions
diff --git a/doc/guides/rel_notes/release_18_11.rst b/doc/guides/rel_notes/release_18_11.rst
index c60879c..cfa92b8 100644
--- a/doc/guides/rel_notes/release_18_11.rst
+++ b/doc/guides/rel_notes/release_18_11.rst
@@ -69,6 +69,16 @@ New Features
checked out against that dma mask and rejected if out of range. If more than
one device has addressing limitations, the dma mask is the more restricted one.
+* **Updated the C11 memory model version of ring library.**
+ The latency is decreased for architectures using the C11 memory model
+ version of the ring library.
+ On Cavium ThunderX2 platform, the changes decreased latency by 27~29%
+ and 3~15% for MPMC and SPSC cases respectively (with 2 lcores). The
+ real improvements may vary with the number of contending lcores and
+ the size of ring.
* **Added hot-unplug handle mechanism.**
``rte_dev_hotplug_handle_enable`` and ``rte_dev_hotplug_handle_disable`` are