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authorKiran Kumar K <kirankumark@marvell.com>2019-10-23 20:55:48 +0530
committerFerruh Yigit <ferruh.yigit@intel.com>2019-11-08 23:15:04 +0100
commit87195879a066258bacb0252712d438955c72d7c5 (patch)
tree3741b2c8c8bb5af3539254a84016ea7580ff51ec /doc/guides/nics
parent8f3afc1359bd2654704ad19fd21891d3d5296ee9 (diff)
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net/octeontx2: support enabling switch type
Adding support to configure specific switch types like high2 and dsa on a port. When this switch type is configured, it is expected that all the traffic on that port should be of specific type only. Signed-off-by: Kiran Kumar K <kirankumark@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Diffstat (limited to 'doc/guides/nics')
-rw-r--r--doc/guides/nics/octeontx2.rst12
1 files changed, 12 insertions, 0 deletions
diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst
index fc8a130..adf7c71 100644
--- a/doc/guides/nics/octeontx2.rst
+++ b/doc/guides/nics/octeontx2.rst
@@ -170,6 +170,18 @@ Runtime Config Options
With the above configuration, each send queue's decscriptor buffer count is
limited to a maximum of 64 buffers.
+- ``switch header enable`` (default ``none``)
+
+ A port can be configured to a specific switch header type by using
+ ``switch_header`` ``devargs`` parameter.
+
+ For example::
+
+ -w 0002:02:00.0,switch_header="higig2"
+
+ With the above configuration, higig2 will be enabled on that port and the
+ traffic on this port should be higig2 traffic only. Supported switch header
+ types are "higig2" and "dsa".
.. note::