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authorYongseok Koh <yskoh@mellanox.com>2017-03-15 16:55:44 -0700
committerFerruh Yigit <ferruh.yigit@intel.com>2017-04-04 18:59:41 +0200
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net/mlx5: add enhanced multi-packet send for ConnectX-5
ConnectX-5 supports enhanced version of multi-packet send (MPS). An MPS Tx descriptor can carry multiple packets either by including pointers of packets or by inlining packets. Inlining packet data can be helpful to better utilize PCIe bandwidth. In addition, Enhanced MPS supports hybrid mode - mixing inlined packets and pointers in a descriptor. This feature is enabled by default if supported by HW. Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Diffstat (limited to 'doc/guides/nics/mlx5.rst')
-rw-r--r--doc/guides/nics/mlx5.rst31
1 files changed, 27 insertions, 4 deletions
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 41f3a47..0783aeb 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -183,10 +183,17 @@ Run-time configuration
- ``txq_mpw_en`` parameter [int]
- A nonzero value enables multi-packet send. This feature allows the TX
- burst function to pack up to five packets in two descriptors in order to
- save PCI bandwidth and improve performance at the cost of a slightly
- higher CPU usage.
+ A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and
+ enhanced multi-packet send (Enhanced MPS) for ConnectX-5. MPS allows the
+ TX burst function to pack up multiple packets in a single descriptor
+ session in order to save PCI bandwidth and improve performance at the
+ cost of a slightly higher CPU usage. When ``txq_inline`` is set along
+ with ``txq_mpw_en``, TX burst function tries to copy entire packet data
+ on to TX descriptor instead of including pointer of packet only if there
+ is enough room remained in the descriptor. ``txq_inline`` sets
+ per-descriptor space for either pointers or inlined packets. In addition,
+ Enhanced MPS supports hybrid mode - mixing inlined packets and pointers
+ in the same descriptor.
This option cannot be used in conjunction with ``tso`` below. When ``tso``
is set, ``txq_mpw_en`` is disabled.
@@ -194,6 +201,22 @@ Run-time configuration
It is currently only supported on the ConnectX-4 Lx and ConnectX-5
families of adapters. Enabled by default.
+- ``txq_mpw_hdr_dseg_en`` parameter [int]
+
+ A nonzero value enables including two pointers in the first block of TX
+ descriptor. This can be used to lessen CPU load for memory copy.
+
+ Effective only when Enhanced MPS is supported. Disabled by default.
+
+- ``txq_max_inline_len`` parameter [int]
+
+ Maximum size of packet to be inlined. This limits the size of packet to
+ be inlined. If the size of a packet is larger than configured value, the
+ packet isn't inlined even though there's enough space remained in the
+ descriptor. Instead, the packet is included with pointer.
+
+ Effective only when Enhanced MPS is supported. The default value is 256.
+
- ``tso`` parameter [int]
A nonzero value enables hardware TSO.