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authorThomas Monjalon <thomas@monjalon.net>2019-07-10 12:01:47 +0200
committerThomas Monjalon <thomas@monjalon.net>2019-07-10 18:53:47 +0200
commitd34b50181d188a17b6273ea9fcd86897a9c98872 (patch)
tree7cda791056f650bf074ef9c949510f0049742786
parent716459740232aceb39cc4cdc411ad76acc857c50 (diff)
downloaddpdk-d34b50181d188a17b6273ea9fcd86897a9c98872.zip
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doc: fix PDF build in octeontx2 guide
The unicode characters to draw the debugfs tree may fail with some Latex distributions. These characters are replaced with some ASCII equivalents. Fixes: 14ad4f018453 ("doc: add Marvell OCTEON TX2 platform guide") Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Jerin Jacob <jerinj@marvell.com>
-rw-r--r--doc/guides/platform/octeontx2.rst96
1 files changed, 48 insertions, 48 deletions
diff --git a/doc/guides/platform/octeontx2.rst b/doc/guides/platform/octeontx2.rst
index 7d1fead..97c631f 100644
--- a/doc/guides/platform/octeontx2.rst
+++ b/doc/guides/platform/octeontx2.rst
@@ -214,54 +214,54 @@ The file structure under ``/sys/kernel/debug`` is as follows
.. code-block:: console
octeontx2/
- ├── cgx
- │ ├── cgx0
- │ │ └── lmac0
- │ │ └── stats
- │ ├── cgx1
- │ │ ├── lmac0
- │ │ │ └── stats
- │ │ └── lmac1
- │ │ └── stats
- │ └── cgx2
- │ └── lmac0
- │ └── stats
- ├── cpt
- │ ├── cpt_engines_info
- │ ├── cpt_engines_sts
- │ ├── cpt_err_info
- │ ├── cpt_lfs_info
- │ └── cpt_pc
- ├──── nix
- │ ├── cq_ctx
- │ ├── ndc_rx_cache
- │ ├── ndc_rx_hits_miss
- │ ├── ndc_tx_cache
- │ ├── ndc_tx_hits_miss
- │ ├── qsize
- │ ├── rq_ctx
- │ ├── sq_ctx
- │ └── tx_stall_hwissue
- ├── npa
- │ ├── aura_ctx
- │ ├── ndc_cache
- │ ├── ndc_hits_miss
- │ ├── pool_ctx
- │ └── qsize
- ├── npc
- │ ├── mcam_info
- │ └── rx_miss_act_stats
- ├── rsrc_alloc
- └── sso
- ├── hws
- │ └── sso_hws_info
- └── hwgrp
- ├── sso_hwgrp_aq_thresh
- ├── sso_hwgrp_iaq_walk
- ├── sso_hwgrp_pc
- ├── sso_hwgrp_free_list_walk
- ├── sso_hwgrp_ient_walk
- └── sso_hwgrp_taq_walk
+ |-- cgx
+ | |-- cgx0
+ | | '-- lmac0
+ | | '-- stats
+ | |-- cgx1
+ | | |-- lmac0
+ | | | '-- stats
+ | | '-- lmac1
+ | | '-- stats
+ | '-- cgx2
+ | '-- lmac0
+ | '-- stats
+ |-- cpt
+ | |-- cpt_engines_info
+ | |-- cpt_engines_sts
+ | |-- cpt_err_info
+ | |-- cpt_lfs_info
+ | '-- cpt_pc
+ |---- nix
+ | |-- cq_ctx
+ | |-- ndc_rx_cache
+ | |-- ndc_rx_hits_miss
+ | |-- ndc_tx_cache
+ | |-- ndc_tx_hits_miss
+ | |-- qsize
+ | |-- rq_ctx
+ | |-- sq_ctx
+ | '-- tx_stall_hwissue
+ |-- npa
+ | |-- aura_ctx
+ | |-- ndc_cache
+ | |-- ndc_hits_miss
+ | |-- pool_ctx
+ | '-- qsize
+ |-- npc
+ | |-- mcam_info
+ | '-- rx_miss_act_stats
+ |-- rsrc_alloc
+ '-- sso
+ |-- hws
+ | '-- sso_hws_info
+ '-- hwgrp
+ |-- sso_hwgrp_aq_thresh
+ |-- sso_hwgrp_iaq_walk
+ |-- sso_hwgrp_pc
+ |-- sso_hwgrp_free_list_walk
+ |-- sso_hwgrp_ient_walk
+ '-- sso_hwgrp_taq_walk
RVU block LF allocation: