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authorViacheslav Ovsiienko <viacheslavo@mellanox.com>2019-11-27 13:06:16 +0000
committerThomas Monjalon <thomas@monjalon.net>2019-11-27 16:27:00 +0100
commitc8a1a172ae2b4535b57bcf194a731334246a5a35 (patch)
treef0fc66c3a9bdf42b646cece95b491c89ab97458b
parent57725162f05dfb9f81fa3bae76018488083f9493 (diff)
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net/mlx5: fix legacy inline multi-packet performance
The legacy multi-packet write is the feature allowing to put multiple packets into one transmitting descriptor, this feature is supported by only NIC ConnectX-4LX. The number of packets should be limited to provide optimal size descriptor and better performance. Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template") Cc: stable@dpdk.org Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com>
-rw-r--r--drivers/net/mlx5/mlx5_prm.h1
-rw-r--r--drivers/net/mlx5/mlx5_rxtx.c4
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h
index 2bac6a7..a805363 100644
--- a/drivers/net/mlx5/mlx5_prm.h
+++ b/drivers/net/mlx5/mlx5_prm.h
@@ -100,6 +100,7 @@
*/
#define MLX5_EMPW_MAX_PACKETS MLX5_TX_COMP_THRESH
#define MLX5_MPW_MAX_PACKETS 6
+#define MLX5_MPW_INLINE_MAX_PACKETS 2
/*
* Default packet length threshold to be inlined with
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 25d915c..acf0fd7 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -4059,7 +4059,9 @@ mlx5_tx_burst_empw_inline(struct mlx5_txq_data *restrict txq,
* Limits the amount of packets in one WQE
* to improve CQE latency generation.
*/
- nlim = RTE_MIN(pkts_n, MLX5_EMPW_MAX_PACKETS);
+ nlim = RTE_MIN(pkts_n, MLX5_TXOFF_CONFIG(MPW) ?
+ MLX5_MPW_INLINE_MAX_PACKETS :
+ MLX5_EMPW_MAX_PACKETS);
/* Check whether we have minimal amount WQEs */
if (unlikely(loc->wqe_free <
((2 + MLX5_EMPW_MIN_PACKETS + 3) / 4)))