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authorHarman Kalra <hkalra@marvell.com>2019-07-25 10:26:54 +0000
committerThomas Monjalon <thomas@monjalon.net>2019-07-29 22:18:01 +0200
commit9f741506f838dd25fce1cee0b904590f10f56f1e (patch)
treedb5f528b04c3cb7586905155f3c025647110cb00
parentef9f8bb6d52c1ee324e14c3a6cc7167386ac6252 (diff)
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drivers/octeontx2: fix recursive interrupts
In case of QINT interrupt occurrence, SW fails to clear the QINT line resulting in recursive interrupts because currently interrupt handler gets the cause of the interrupt by reading NIX_LF_RQ[SQ/CQ/AURA/POOL]_OP_INT but does not write 1 to clear RQ[SQ/CQ/ERR]_INT field in respective NIX_LF_RQ[SQ/CQ/AURA/POOL]_OP_INT registers. Fixes: dc47ba15f645 ("net/octeontx2: handle queue specific error interrupts") Fixes: 50b95c3ea7af ("mempool/octeontx2: add NPA IRQ handler") Signed-off-by: Harman Kalra <hkalra@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
-rw-r--r--drivers/mempool/octeontx2/otx2_mempool_irq.c2
-rw-r--r--drivers/net/octeontx2/otx2_ethdev_irq.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mempool/octeontx2/otx2_mempool_irq.c b/drivers/mempool/octeontx2/otx2_mempool_irq.c
index ce41044..5fa22b9 100644
--- a/drivers/mempool/octeontx2/otx2_mempool_irq.c
+++ b/drivers/mempool/octeontx2/otx2_mempool_irq.c
@@ -123,7 +123,7 @@ npa_lf_q_irq_get_and_clear(struct otx2_npa_lf *lf, uint32_t q,
qint = reg & 0xff;
wdata &= mask;
- otx2_write64(wdata, lf->base + off);
+ otx2_write64(wdata | qint, lf->base + off);
return qint;
}
diff --git a/drivers/net/octeontx2/otx2_ethdev_irq.c b/drivers/net/octeontx2/otx2_ethdev_irq.c
index 9006e5c..2256e40 100644
--- a/drivers/net/octeontx2/otx2_ethdev_irq.c
+++ b/drivers/net/octeontx2/otx2_ethdev_irq.c
@@ -138,7 +138,7 @@ nix_lf_q_irq_get_and_clear(struct otx2_eth_dev *dev, uint16_t q,
qint = reg & 0xff;
wdata &= mask;
- otx2_write64(wdata, dev->base + off);
+ otx2_write64(wdata | qint, dev->base + off);
return qint;
}