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authorZiyang Xuan <xuanziyang2@huawei.com>2019-06-27 16:18:47 +0800
committerFerruh Yigit <ferruh.yigit@intel.com>2019-06-28 20:31:49 +0200
commit64727024d2fd4985d21efb88d90b1504e8569e71 (patch)
treeb2ea3c43065925e61df89835fc2cc84aee9674b9
parent1d09792a270aed2f2eaba884f7820fc5fbe33a2e (diff)
downloaddpdk-64727024d2fd.zip
dpdk-64727024d2fd.tar.gz
dpdk-64727024d2fd.tar.xz
net/hinic: add device initialization
Add device initialization function codes. Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
-rw-r--r--drivers/net/hinic/Makefile2
-rw-r--r--drivers/net/hinic/hinic_pmd_ethdev.c700
-rw-r--r--drivers/net/hinic/hinic_pmd_rx.c178
-rw-r--r--drivers/net/hinic/hinic_pmd_rx.h128
-rw-r--r--drivers/net/hinic/hinic_pmd_tx.c92
-rw-r--r--drivers/net/hinic/hinic_pmd_tx.h143
-rw-r--r--drivers/net/hinic/meson.build2
7 files changed, 1241 insertions, 4 deletions
diff --git a/drivers/net/hinic/Makefile b/drivers/net/hinic/Makefile
index 7255335..123a626 100644
--- a/drivers/net/hinic/Makefile
+++ b/drivers/net/hinic/Makefile
@@ -60,5 +60,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_nicio.c
SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_wq.c
SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_ethdev.c
+SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_rx.c
+SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_tx.c
include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/hinic/hinic_pmd_ethdev.c b/drivers/net/hinic/hinic_pmd_ethdev.c
index 2491b7a..f984465 100644
--- a/drivers/net/hinic/hinic_pmd_ethdev.c
+++ b/drivers/net/hinic/hinic_pmd_ethdev.c
@@ -5,13 +5,24 @@
#include <rte_pci.h>
#include <rte_bus_pci.h>
#include <rte_ethdev_pci.h>
+#include <rte_mbuf.h>
#include <rte_malloc.h>
#include <rte_memcpy.h>
+#include <rte_mempool.h>
+#include <rte_errno.h>
#include "base/hinic_compat.h"
#include "base/hinic_pmd_hwdev.h"
+#include "base/hinic_pmd_hwif.h"
+#include "base/hinic_pmd_wq.h"
+#include "base/hinic_pmd_cfg.h"
+#include "base/hinic_pmd_mgmt.h"
+#include "base/hinic_pmd_cmdq.h"
#include "base/hinic_pmd_niccfg.h"
+#include "base/hinic_pmd_nicio.h"
#include "hinic_pmd_ethdev.h"
+#include "hinic_pmd_tx.h"
+#include "hinic_pmd_rx.h"
/* Vendor ID used by Huawei devices */
#define HINIC_HUAWEI_VENDOR_ID 0x19E5
@@ -22,6 +33,13 @@
#define HINIC_DEV_ID_MEZZ_40GE 0x020D
#define HINIC_DEV_ID_MEZZ_100GE 0x0205
+#define HINIC_SERVICE_MODE_NIC 2
+
+#define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
+
+#define DEFAULT_BASE_COS 4
+#define NR_MAX_COS 8
+
#define HINIC_MIN_RX_BUF_SIZE 1024
#define HINIC_MAX_MAC_ADDRS 1
@@ -41,6 +59,91 @@ static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
};
/**
+ * Interrupt handler triggered by NIC for handling
+ * specific event.
+ *
+ * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
+ **/
+static void hinic_dev_interrupt_handler(void *param)
+{
+ struct rte_eth_dev *dev = param;
+ struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+
+ if (!hinic_test_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
+ PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
+ nic_dev->proc_dev_name, dev->data->port_id);
+ return;
+ }
+
+ /* aeq0 msg handler */
+ hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
+}
+
+/**
+ * Ethernet device configuration.
+ *
+ * Prepare the driver for a given number of TX and RX queues, mtu size
+ * and configure RSS.
+ *
+ * @param dev
+ * Pointer to Ethernet device structure.
+ *
+ * @return
+ * 0 on success, negative error value otherwise.
+ */
+static int hinic_dev_configure(struct rte_eth_dev *dev)
+{
+ struct hinic_nic_dev *nic_dev;
+ struct hinic_nic_io *nic_io;
+ int err;
+
+ nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+ nic_io = nic_dev->hwdev->nic_io;
+
+ nic_dev->num_sq = dev->data->nb_tx_queues;
+ nic_dev->num_rq = dev->data->nb_rx_queues;
+
+ nic_io->num_sqs = dev->data->nb_tx_queues;
+ nic_io->num_rqs = dev->data->nb_rx_queues;
+
+ /* queue pair is max_num(sq, rq) */
+ nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
+ nic_dev->num_sq : nic_dev->num_rq;
+ nic_io->num_qps = nic_dev->num_qps;
+
+ if (nic_dev->num_qps > nic_io->max_qps) {
+ PMD_DRV_LOG(ERR,
+ "Queue number out of range, get queue_num:%d, max_queue_num:%d",
+ nic_dev->num_qps, nic_io->max_qps);
+ return -EINVAL;
+ }
+
+ /* mtu size is 256~9600 */
+ if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
+ dev->data->dev_conf.rxmode.max_rx_pkt_len >
+ HINIC_MAX_JUMBO_FRAME_SIZE) {
+ PMD_DRV_LOG(ERR,
+ "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
+ "expect between %d and %d",
+ dev->data->dev_conf.rxmode.max_rx_pkt_len,
+ HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
+ return -EINVAL;
+ }
+
+ nic_dev->mtu_size =
+ HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
+
+ /* rss template */
+ err = hinic_config_mq_mode(dev, TRUE);
+ if (err) {
+ PMD_DRV_LOG(ERR, "Config multi-queue failed");
+ return err;
+ }
+
+ return HINIC_OK;
+}
+
+/**
* Get link speed from NIC.
*
* @param dev
@@ -128,27 +231,618 @@ hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
info->hash_key_size = HINIC_RSS_KEY_SIZE;
info->reta_size = HINIC_RSS_INDIR_SIZE;
+ info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
info->rx_desc_lim = hinic_rx_desc_lim;
info->tx_desc_lim = hinic_tx_desc_lim;
}
-static int hinic_func_init(__rte_unused struct rte_eth_dev *eth_dev)
+static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
+{
+ u16 q_id;
+
+ for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
+ hinic_destroy_rq(nic_dev->hwdev, q_id);
+}
+
+static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
+{
+ u16 q_id;
+
+ for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
+ hinic_destroy_sq(nic_dev->hwdev, q_id);
+}
+
+static void hinic_disable_interrupt(struct rte_eth_dev *dev)
{
+ struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+ struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+ int ret, retries = 0;
+
+ hinic_clear_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
+
+ /* disable msix interrupt in hardware */
+ hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
+
+ /* disable rte interrupt */
+ ret = rte_intr_disable(&pci_dev->intr_handle);
+ if (ret)
+ PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
+
+ do {
+ ret =
+ rte_intr_callback_unregister(&pci_dev->intr_handle,
+ hinic_dev_interrupt_handler, dev);
+ if (ret >= 0) {
+ break;
+ } else if (ret == -EAGAIN) {
+ rte_delay_ms(100);
+ retries++;
+ } else {
+ PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
+ ret);
+ break;
+ }
+ } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
+
+ if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
+ PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
+ retries);
+}
+
+/**
+ * Init mac_vlan table in NIC.
+ *
+ * @param dev
+ * Pointer to Ethernet device structure.
+ *
+ * @return
+ * 0 on success and stats is filled,
+ * negative error value otherwise.
+ */
+static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
+{
+ struct hinic_nic_dev *nic_dev =
+ HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
+ uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
+ u16 func_id = 0;
+ int rc = 0;
+
+ rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
+ if (rc)
+ return rc;
+
+ memmove(eth_dev->data->mac_addrs->addr_bytes,
+ addr_bytes, RTE_ETHER_ADDR_LEN);
+
+ func_id = hinic_global_func_id(nic_dev->hwdev);
+ rc = hinic_set_mac(nic_dev->hwdev, eth_dev->data->mac_addrs->addr_bytes,
+ 0, func_id);
+ if (rc && rc != HINIC_PF_SET_VF_ALREADY)
+ return rc;
+
return 0;
}
/**
+ * Deinit mac_vlan table in NIC.
+ *
+ * @param dev
+ * Pointer to Ethernet device structure.
+ *
+ * @return
+ * 0 on success and stats is filled,
+ * negative error value otherwise.
+ */
+static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
+{
+ struct hinic_nic_dev *nic_dev =
+ HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
+ int rc;
+ u16 func_id = 0;
+
+ if (rte_is_zero_ether_addr(eth_dev->data->mac_addrs))
+ return;
+
+ func_id = hinic_global_func_id(nic_dev->hwdev);
+ rc = hinic_del_mac(nic_dev->hwdev,
+ eth_dev->data->mac_addrs->addr_bytes,
+ 0, func_id);
+ if (rc && rc != HINIC_PF_SET_VF_ALREADY)
+ PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
+ eth_dev->data->name);
+}
+
+static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
+{
+ struct nic_pause_config pause_config = {0};
+
+ pause_config.auto_neg = 0;
+ pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
+ pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
+
+ return hinic_set_pause_config(nic_dev->hwdev, pause_config);
+}
+
+static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
+{
+ u8 up_tc[HINIC_DCB_UP_MAX] = {0};
+ u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
+ u8 up_bw[HINIC_DCB_UP_MAX] = {0};
+ u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
+ u8 up_strict[HINIC_DCB_UP_MAX] = {0};
+ int i = 0;
+
+ pg_bw[0] = 100;
+ for (i = 0; i < HINIC_DCB_UP_MAX; i++)
+ up_bw[i] = 100;
+
+ return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
+ up_pgid, up_bw, up_strict);
+}
+
+static void hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
+{
+ nic_dev->default_cos =
+ (hinic_global_func_id(nic_dev->hwdev) +
+ DEFAULT_BASE_COS) % NR_MAX_COS;
+}
+
+static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
+{
+ int err;
+
+ hinic_init_default_cos(nic_dev);
+
+ /* Restore DCB configure to default status */
+ err = hinic_set_default_dcb_feature(nic_dev);
+ if (err)
+ return err;
+
+ /* disable LRO */
+ err = hinic_set_rx_lro(nic_dev->hwdev, 0, 0, (u8)0);
+ if (err)
+ return err;
+
+ /* Set pause enable, and up will disable pfc. */
+ err = hinic_set_default_pause_feature(nic_dev);
+ if (err)
+ return err;
+
+ err = hinic_reset_port_link_cfg(nic_dev->hwdev);
+ if (err)
+ return err;
+
+ err = hinic_set_link_status_follow(nic_dev->hwdev,
+ HINIC_LINK_FOLLOW_PORT);
+ if (err == HINIC_MGMT_CMD_UNSUPPORTED)
+ PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
+ else if (err)
+ return err;
+
+ return hinic_set_anti_attack(nic_dev->hwdev, true);
+}
+
+static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
+{
+ struct hinic_board_info info = { 0 };
+ int rc;
+
+ rc = hinic_get_board_info(nic_dev->hwdev, &info);
+ if (rc)
+ return rc;
+
+ return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
+ HINIC_ERROR);
+}
+
+static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
+{
+ nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
+ if (nic_dev->cpy_mpool == NULL) {
+ nic_dev->cpy_mpool =
+ rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
+ HINIC_COPY_MEMPOOL_DEPTH,
+ RTE_CACHE_LINE_SIZE, 0,
+ HINIC_COPY_MBUF_SIZE,
+ rte_socket_id());
+ if (!nic_dev->cpy_mpool) {
+ PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
+ rte_errno, nic_dev->proc_dev_name);
+ return -ENOMEM;
+ }
+ }
+
+ return 0;
+}
+
+static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
+{
+ if (nic_dev->cpy_mpool != NULL)
+ rte_mempool_free(nic_dev->cpy_mpool);
+}
+
+static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
+{
+ u32 txq_size;
+ u32 rxq_size;
+
+ /* allocate software txq array */
+ txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
+ nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
+ if (!nic_dev->txqs) {
+ PMD_DRV_LOG(ERR, "Allocate txqs failed");
+ return -ENOMEM;
+ }
+
+ /* allocate software rxq array */
+ rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
+ nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
+ if (!nic_dev->rxqs) {
+ /* free txqs */
+ kfree(nic_dev->txqs);
+ nic_dev->txqs = NULL;
+
+ PMD_DRV_LOG(ERR, "Allocate rxqs failed");
+ return -ENOMEM;
+ }
+
+ return HINIC_OK;
+}
+
+static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
+{
+ kfree(nic_dev->txqs);
+ nic_dev->txqs = NULL;
+
+ kfree(nic_dev->rxqs);
+ nic_dev->rxqs = NULL;
+}
+
+static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
+{
+ struct hinic_nic_dev *nic_dev =
+ HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
+ int rc;
+
+ nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
+ RTE_CACHE_LINE_SIZE);
+ if (!nic_dev->hwdev) {
+ PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
+ eth_dev->data->name);
+ return -ENOMEM;
+ }
+ nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
+
+ /* init osdep*/
+ rc = hinic_osdep_init(nic_dev->hwdev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
+ eth_dev->data->name);
+ goto init_osdep_fail;
+ }
+
+ /* init_hwif */
+ rc = hinic_hwif_res_init(nic_dev->hwdev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
+ eth_dev->data->name);
+ goto init_hwif_fail;
+ }
+
+ /* init_cfg_mgmt */
+ rc = init_cfg_mgmt(nic_dev->hwdev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
+ eth_dev->data->name);
+ goto init_cfgmgnt_fail;
+ }
+
+ /* init_aeqs */
+ rc = hinic_comm_aeqs_init(nic_dev->hwdev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
+ eth_dev->data->name);
+ goto init_aeqs_fail;
+ }
+
+ /* init_pf_to_mgnt */
+ rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
+ eth_dev->data->name);
+ goto init_pf_to_mgmt_fail;
+ }
+
+ rc = hinic_card_workmode_check(nic_dev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
+ eth_dev->data->name);
+ goto workmode_check_fail;
+ }
+
+ /* do l2nic reset to make chip clear */
+ rc = hinic_l2nic_reset(nic_dev->hwdev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
+ eth_dev->data->name);
+ goto l2nic_reset_fail;
+ }
+
+ /* init dma and aeq msix attribute table */
+ (void)hinic_init_attr_table(nic_dev->hwdev);
+
+ /* init_cmdqs */
+ rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
+ eth_dev->data->name);
+ goto init_cmdq_fail;
+ }
+
+ /* set hardware state active */
+ rc = hinic_activate_hwdev_state(nic_dev->hwdev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
+ eth_dev->data->name);
+ goto init_resources_state_fail;
+ }
+
+ /* init_capability */
+ rc = hinic_init_capability(nic_dev->hwdev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
+ eth_dev->data->name);
+ goto init_cap_fail;
+ }
+
+ /* get nic capability */
+ if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap))
+ goto nic_check_fail;
+
+ /* init root cla and function table */
+ rc = hinic_init_nicio(nic_dev->hwdev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
+ eth_dev->data->name);
+ goto init_nicio_fail;
+ }
+
+ /* init_software_txrxq */
+ rc = hinic_init_sw_rxtxqs(nic_dev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
+ eth_dev->data->name);
+ goto init_sw_rxtxqs_fail;
+ }
+
+ rc = hinic_copy_mempool_init(nic_dev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
+ eth_dev->data->name);
+ goto init_mpool_fail;
+ }
+
+ /* set hardware feature to default status */
+ rc = hinic_set_default_hw_feature(nic_dev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
+ eth_dev->data->name);
+ goto set_default_hw_feature_fail;
+ }
+
+ return 0;
+
+set_default_hw_feature_fail:
+ hinic_copy_mempool_uninit(nic_dev);
+
+init_mpool_fail:
+ hinic_deinit_sw_rxtxqs(nic_dev);
+
+init_sw_rxtxqs_fail:
+ hinic_deinit_nicio(nic_dev->hwdev);
+
+nic_check_fail:
+init_nicio_fail:
+init_cap_fail:
+ hinic_deactivate_hwdev_state(nic_dev->hwdev);
+
+init_resources_state_fail:
+ hinic_comm_cmdqs_free(nic_dev->hwdev);
+
+init_cmdq_fail:
+l2nic_reset_fail:
+workmode_check_fail:
+ hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
+
+init_pf_to_mgmt_fail:
+ hinic_comm_aeqs_free(nic_dev->hwdev);
+
+init_aeqs_fail:
+ free_cfg_mgmt(nic_dev->hwdev);
+
+init_cfgmgnt_fail:
+ hinic_hwif_res_free(nic_dev->hwdev);
+
+init_hwif_fail:
+ hinic_osdep_deinit(nic_dev->hwdev);
+
+init_osdep_fail:
+ rte_free(nic_dev->hwdev);
+ nic_dev->hwdev = NULL;
+
+ return rc;
+}
+
+static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
+{
+ struct hinic_nic_dev *nic_dev =
+ HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
+
+ (void)hinic_set_link_status_follow(nic_dev->hwdev,
+ HINIC_LINK_FOLLOW_DEFAULT);
+ hinic_copy_mempool_uninit(nic_dev);
+ hinic_deinit_sw_rxtxqs(nic_dev);
+ hinic_deinit_nicio(nic_dev->hwdev);
+ hinic_deactivate_hwdev_state(nic_dev->hwdev);
+ hinic_comm_cmdqs_free(nic_dev->hwdev);
+ hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
+ hinic_comm_aeqs_free(nic_dev->hwdev);
+ free_cfg_mgmt(nic_dev->hwdev);
+ hinic_hwif_res_free(nic_dev->hwdev);
+ hinic_osdep_deinit(nic_dev->hwdev);
+ rte_free(nic_dev->hwdev);
+ nic_dev->hwdev = NULL;
+}
+
+static int hinic_func_init(struct rte_eth_dev *eth_dev)
+{
+ struct rte_pci_device *pci_dev;
+ struct rte_ether_addr *eth_addr;
+ struct hinic_nic_dev *nic_dev;
+ int rc;
+
+ pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
+
+ /* EAL is SECONDARY and eth_dev is already created */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+ rc = rte_intr_callback_register(&pci_dev->intr_handle,
+ hinic_dev_interrupt_handler,
+ (void *)eth_dev);
+ if (rc)
+ PMD_DRV_LOG(ERR, "Initialize %s failed in secondary process",
+ eth_dev->data->name);
+
+ return rc;
+ }
+
+ nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
+ memset(nic_dev, 0, sizeof(*nic_dev));
+
+ snprintf(nic_dev->proc_dev_name,
+ sizeof(nic_dev->proc_dev_name),
+ "hinic-%.4x:%.2x:%.2x.%x",
+ pci_dev->addr.domain, pci_dev->addr.bus,
+ pci_dev->addr.devid, pci_dev->addr.function);
+
+ /* alloc mac_addrs */
+ eth_addr = rte_zmalloc("hinic_mac", sizeof(*eth_addr), 0);
+ if (!eth_addr) {
+ PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
+ eth_dev->data->name);
+ rc = -ENOMEM;
+ goto eth_addr_fail;
+ }
+ eth_dev->data->mac_addrs = eth_addr;
+
+ /*
+ * Pass the information to the rte_eth_dev_close() that it should also
+ * release the private port resources.
+ */
+ eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
+
+ /* create hardware nic_device */
+ rc = hinic_nic_dev_create(eth_dev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
+ eth_dev->data->name);
+ goto create_nic_dev_fail;
+ }
+
+ rc = hinic_init_mac_addr(eth_dev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
+ eth_dev->data->name);
+ goto init_mac_fail;
+ }
+
+ /* register callback func to eal lib */
+ rc = rte_intr_callback_register(&pci_dev->intr_handle,
+ hinic_dev_interrupt_handler,
+ (void *)eth_dev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
+ eth_dev->data->name);
+ goto reg_intr_cb_fail;
+ }
+
+ /* enable uio/vfio intr/eventfd mapping */
+ rc = rte_intr_enable(&pci_dev->intr_handle);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
+ eth_dev->data->name);
+ goto enable_intr_fail;
+ }
+ hinic_set_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
+
+ hinic_set_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
+ PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
+ eth_dev->data->name);
+
+ return 0;
+
+enable_intr_fail:
+ (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
+ hinic_dev_interrupt_handler,
+ (void *)eth_dev);
+
+reg_intr_cb_fail:
+ hinic_deinit_mac_addr(eth_dev);
+
+init_mac_fail:
+ hinic_nic_dev_destroy(eth_dev);
+
+create_nic_dev_fail:
+ rte_free(eth_addr);
+ eth_dev->data->mac_addrs = NULL;
+
+eth_addr_fail:
+ PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
+ eth_dev->data->name);
+ return rc;
+}
+
+/**
* DPDK callback to close the device.
*
* @param dev
* Pointer to Ethernet device structure.
*/
-static void hinic_dev_close(__rte_unused struct rte_eth_dev *dev)
+static void hinic_dev_close(struct rte_eth_dev *dev)
{
+ struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+
+ if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
+ PMD_DRV_LOG(WARNING, "Device %s already closed",
+ dev->data->name);
+ return;
+ }
+
+ /* rx_cqe, rx_info */
+ hinic_free_all_rx_resources(dev);
+
+ /* tx_info */
+ hinic_free_all_tx_resources(dev);
+
+ /* free wq, pi_dma_addr */
+ hinic_free_all_rq(nic_dev);
+
+ /* free wq, db_addr */
+ hinic_free_all_sq(nic_dev);
+
+ /* deinit mac vlan tbl */
+ hinic_deinit_mac_addr(dev);
+
+ /* disable hardware and uio interrupt */
+ hinic_disable_interrupt(dev);
+
+ /* deinit nic hardware device */
+ hinic_nic_dev_destroy(dev);
}
static const struct eth_dev_ops hinic_pmd_ops = {
+ .dev_configure = hinic_dev_configure,
.dev_infos_get = hinic_dev_infos_get,
+ .dev_close = hinic_dev_close,
};
static int hinic_dev_init(struct rte_eth_dev *eth_dev)
@@ -182,8 +876,6 @@ static int hinic_dev_uninit(struct rte_eth_dev *dev)
hinic_dev_close(dev);
dev->dev_ops = NULL;
- dev->rx_pkt_burst = NULL;
- dev->tx_pkt_burst = NULL;
rte_free(dev->data->mac_addrs);
dev->data->mac_addrs = NULL;
diff --git a/drivers/net/hinic/hinic_pmd_rx.c b/drivers/net/hinic/hinic_pmd_rx.c
new file mode 100644
index 0000000..f384901
--- /dev/null
+++ b/drivers/net/hinic/hinic_pmd_rx.c
@@ -0,0 +1,178 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2017 Huawei Technologies Co., Ltd
+ */
+
+#include <rte_ether.h>
+#include <rte_mbuf.h>
+
+#include "base/hinic_compat.h"
+#include "base/hinic_pmd_hwdev.h"
+#include "base/hinic_pmd_wq.h"
+#include "base/hinic_pmd_niccfg.h"
+#include "base/hinic_pmd_nicio.h"
+#include "hinic_pmd_ethdev.h"
+#include "hinic_pmd_rx.h"
+
+
+void hinic_destroy_rq(struct hinic_hwdev *hwdev, u16 q_id)
+{
+ struct hinic_nic_io *nic_io = hwdev->nic_io;
+ struct hinic_qp *qp = &nic_io->qps[q_id];
+ struct hinic_rq *rq = &qp->rq;
+
+ if (qp->rq.wq == NULL)
+ return;
+
+ dma_free_coherent_volatile(hwdev, HINIC_PAGE_SIZE,
+ (volatile void *)rq->pi_virt_addr,
+ rq->pi_dma_addr);
+ hinic_wq_free(nic_io->hwdev, qp->rq.wq);
+ qp->rq.wq = NULL;
+}
+
+static void hinic_rx_free_cqe(struct hinic_rxq *rxq)
+{
+ size_t cqe_mem_size;
+
+ cqe_mem_size = sizeof(struct hinic_rq_cqe) * rxq->q_depth;
+ dma_free_coherent(rxq->nic_dev->hwdev, cqe_mem_size,
+ rxq->cqe_start_vaddr, rxq->cqe_start_paddr);
+ rxq->cqe_start_vaddr = NULL;
+}
+
+void hinic_free_rx_resources(struct hinic_rxq *rxq)
+{
+ if (rxq->rx_info == NULL)
+ return;
+
+ hinic_rx_free_cqe(rxq);
+ kfree(rxq->rx_info);
+ rxq->rx_info = NULL;
+}
+
+void hinic_free_all_rx_resources(struct rte_eth_dev *eth_dev)
+{
+ u16 q_id;
+ struct hinic_nic_dev *nic_dev =
+ HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
+
+ for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
+ eth_dev->data->rx_queues[q_id] = NULL;
+
+ if (nic_dev->rxqs[q_id] == NULL)
+ continue;
+
+ hinic_free_all_rx_skbs(nic_dev->rxqs[q_id]);
+ hinic_free_rx_resources(nic_dev->rxqs[q_id]);
+ kfree(nic_dev->rxqs[q_id]);
+ nic_dev->rxqs[q_id] = NULL;
+ }
+}
+
+static void
+hinic_add_rq_to_rx_queue_list(struct hinic_nic_dev *nic_dev, u16 queue_id)
+{
+ u8 rss_queue_count = nic_dev->num_rss;
+
+ RTE_ASSERT(rss_queue_count <= (RTE_DIM(nic_dev->rx_queue_list) - 1));
+
+ nic_dev->rx_queue_list[rss_queue_count] = queue_id;
+ nic_dev->num_rss++;
+}
+
+/**
+ * hinic_setup_num_qps - determine num_qps from rss_tmpl_id
+ * @nic_dev: pointer to the private ethernet device
+ * Return: 0 on Success, error code otherwise.
+ **/
+static int hinic_setup_num_qps(struct hinic_nic_dev *nic_dev)
+{
+ int err, i;
+
+ if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
+ nic_dev->flags &= ~ETH_MQ_RX_RSS_FLAG;
+ nic_dev->num_rss = 0;
+ if (nic_dev->num_rq > 1) {
+ /* get rss template id */
+ err = hinic_rss_template_alloc(nic_dev->hwdev,
+ &nic_dev->rss_tmpl_idx);
+ if (err) {
+ PMD_DRV_LOG(WARNING, "Alloc rss template failed");
+ return err;
+ }
+ nic_dev->flags |= ETH_MQ_RX_RSS_FLAG;
+ for (i = 0; i < nic_dev->num_rq; i++)
+ hinic_add_rq_to_rx_queue_list(nic_dev, i);
+ }
+ }
+
+ return 0;
+}
+
+static void hinic_destroy_num_qps(struct hinic_nic_dev *nic_dev)
+{
+ if (nic_dev->flags & ETH_MQ_RX_RSS_FLAG) {
+ if (hinic_rss_template_free(nic_dev->hwdev,
+ nic_dev->rss_tmpl_idx))
+ PMD_DRV_LOG(WARNING, "Free rss template failed");
+
+ nic_dev->flags &= ~ETH_MQ_RX_RSS_FLAG;
+ }
+}
+
+static int hinic_config_mq_rx_rss(struct hinic_nic_dev *nic_dev, bool on)
+{
+ int ret = 0;
+
+ if (on) {
+ ret = hinic_setup_num_qps(nic_dev);
+ if (ret)
+ PMD_DRV_LOG(ERR, "Setup num_qps failed");
+ } else {
+ hinic_destroy_num_qps(nic_dev);
+ }
+
+ return ret;
+}
+
+int hinic_config_mq_mode(struct rte_eth_dev *dev, bool on)
+{
+ struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+ struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
+ int ret = 0;
+
+ switch (dev_conf->rxmode.mq_mode) {
+ case ETH_MQ_RX_RSS:
+ ret = hinic_config_mq_rx_rss(nic_dev, on);
+ break;
+ default:
+ break;
+ }
+
+ return ret;
+}
+
+void hinic_free_all_rx_skbs(struct hinic_rxq *rxq)
+{
+ struct hinic_nic_dev *nic_dev = rxq->nic_dev;
+ struct hinic_rx_info *rx_info;
+ int free_wqebbs =
+ hinic_get_rq_free_wqebbs(nic_dev->hwdev, rxq->q_id) + 1;
+ volatile struct hinic_rq_cqe *rx_cqe;
+ u16 ci;
+
+ while (free_wqebbs++ < rxq->q_depth) {
+ ci = hinic_get_rq_local_ci(nic_dev->hwdev, rxq->q_id);
+
+ rx_cqe = &rxq->rx_cqe[ci];
+
+ /* clear done bit */
+ rx_cqe->status = 0;
+
+ rx_info = &rxq->rx_info[ci];
+ rte_pktmbuf_free(rx_info->mbuf);
+ rx_info->mbuf = NULL;
+
+ hinic_update_rq_local_ci(nic_dev->hwdev, rxq->q_id, 1);
+ }
+}
diff --git a/drivers/net/hinic/hinic_pmd_rx.h b/drivers/net/hinic/hinic_pmd_rx.h
new file mode 100644
index 0000000..fe2735b
--- /dev/null
+++ b/drivers/net/hinic/hinic_pmd_rx.h
@@ -0,0 +1,128 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2017 Huawei Technologies Co., Ltd
+ */
+
+#ifndef _HINIC_PMD_RX_H_
+#define _HINIC_PMD_RX_H_
+
+#define HINIC_DEFAULT_RX_FREE_THRESH 32
+
+#define HINIC_RSS_OFFLOAD_ALL ( \
+ ETH_RSS_IPV4 | \
+ ETH_RSS_FRAG_IPV4 |\
+ ETH_RSS_NONFRAG_IPV4_TCP | \
+ ETH_RSS_NONFRAG_IPV4_UDP | \
+ ETH_RSS_IPV6 | \
+ ETH_RSS_FRAG_IPV6 | \
+ ETH_RSS_NONFRAG_IPV6_TCP | \
+ ETH_RSS_NONFRAG_IPV6_UDP | \
+ ETH_RSS_IPV6_EX | \
+ ETH_RSS_IPV6_TCP_EX | \
+ ETH_RSS_IPV6_UDP_EX)
+
+enum rq_completion_fmt {
+ RQ_COMPLETE_SGE = 1
+};
+
+struct hinic_rq_ctrl {
+ u32 ctrl_fmt;
+};
+
+struct hinic_rq_cqe {
+ u32 status;
+ u32 vlan_len;
+ u32 offload_type;
+ u32 rss_hash;
+
+ u32 rsvd[4];
+};
+
+struct hinic_rq_cqe_sect {
+ struct hinic_sge sge;
+ u32 rsvd;
+};
+
+struct hinic_rq_bufdesc {
+ u32 addr_high;
+ u32 addr_low;
+};
+
+struct hinic_rq_wqe {
+ struct hinic_rq_ctrl ctrl;
+ u32 rsvd;
+ struct hinic_rq_cqe_sect cqe_sect;
+ struct hinic_rq_bufdesc buf_desc;
+};
+
+struct hinic_rxq_stats {
+ u64 packets;
+ u64 bytes;
+ u64 rx_nombuf;
+ u64 errors;
+ u64 rx_discards;
+ u64 burst_pkts;
+};
+
+/* Attention, Do not add any member in hinic_rx_info
+ * as rxq bulk rearm mode will write mbuf in rx_info
+ */
+struct hinic_rx_info {
+ struct rte_mbuf *mbuf;
+};
+
+struct hinic_rxq {
+ struct hinic_wq *wq;
+ volatile u16 *pi_virt_addr;
+
+ u16 port_id;
+ u16 q_id;
+ u16 q_depth;
+ u16 buf_len;
+
+ u16 rx_free_thresh;
+ u16 rxinfo_align_end;
+
+ unsigned long status;
+ struct hinic_rxq_stats rxq_stats;
+
+ struct hinic_nic_dev *nic_dev;
+
+ struct hinic_rx_info *rx_info;
+ volatile struct hinic_rq_cqe *rx_cqe;
+
+ dma_addr_t cqe_start_paddr;
+ void *cqe_start_vaddr;
+ struct rte_mempool *mb_pool;
+};
+
+int hinic_setup_rx_resources(struct hinic_rxq *rxq);
+
+void hinic_free_all_rx_resources(struct rte_eth_dev *eth_dev);
+
+void hinic_free_all_rx_mbuf(struct rte_eth_dev *eth_dev);
+
+void hinic_free_rx_resources(struct hinic_rxq *rxq);
+
+u16 hinic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, u16 nb_pkts);
+
+void hinic_free_all_rx_skbs(struct hinic_rxq *rxq);
+
+void hinic_rx_alloc_pkts(struct hinic_rxq *rxq);
+
+void hinic_rxq_get_stats(struct hinic_rxq *rxq, struct hinic_rxq_stats *stats);
+
+void hinic_rxq_stats_reset(struct hinic_rxq *rxq);
+
+int hinic_config_mq_mode(struct rte_eth_dev *dev, bool on);
+
+int hinic_rx_configure(struct rte_eth_dev *dev);
+
+void hinic_rx_remove_configure(struct rte_eth_dev *dev);
+
+void hinic_get_func_rx_buf_size(struct hinic_nic_dev *nic_dev);
+
+int hinic_create_rq(struct hinic_hwdev *hwdev, u16 q_id, u16 rq_depth);
+
+void hinic_destroy_rq(struct hinic_hwdev *hwdev, u16 q_id);
+
+#endif /* _HINIC_PMD_RX_H_ */
diff --git a/drivers/net/hinic/hinic_pmd_tx.c b/drivers/net/hinic/hinic_pmd_tx.c
new file mode 100644
index 0000000..79c5f98
--- /dev/null
+++ b/drivers/net/hinic/hinic_pmd_tx.c
@@ -0,0 +1,92 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2017 Huawei Technologies Co., Ltd
+ */
+
+#include <rte_mbuf.h>
+#include <rte_tcp.h>
+#include <rte_sctp.h>
+#include <rte_udp.h>
+#include <rte_ip.h>
+
+#include "base/hinic_compat.h"
+#include "base/hinic_pmd_hwdev.h"
+#include "base/hinic_pmd_hwif.h"
+#include "base/hinic_pmd_wq.h"
+#include "base/hinic_pmd_nicio.h"
+#include "hinic_pmd_ethdev.h"
+#include "hinic_pmd_tx.h"
+
+
+void hinic_free_all_tx_skbs(struct hinic_txq *txq)
+{
+ u16 ci;
+ struct hinic_nic_dev *nic_dev = txq->nic_dev;
+ struct hinic_tx_info *tx_info;
+ int free_wqebbs = hinic_get_sq_free_wqebbs(nic_dev->hwdev,
+ txq->q_id) + 1;
+
+ while (free_wqebbs < txq->q_depth) {
+ ci = hinic_get_sq_local_ci(nic_dev->hwdev, txq->q_id);
+
+ tx_info = &txq->tx_info[ci];
+
+ if (unlikely(tx_info->cpy_mbuf != NULL)) {
+ rte_pktmbuf_free(tx_info->cpy_mbuf);
+ tx_info->cpy_mbuf = NULL;
+ }
+
+ rte_pktmbuf_free(tx_info->mbuf);
+ hinic_update_sq_local_ci(nic_dev->hwdev, txq->q_id,
+ tx_info->wqebb_cnt);
+
+ free_wqebbs += tx_info->wqebb_cnt;
+ tx_info->mbuf = NULL;
+ }
+}
+
+void hinic_free_all_tx_resources(struct rte_eth_dev *eth_dev)
+{
+ u16 q_id;
+ struct hinic_nic_dev *nic_dev =
+ HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
+
+ for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
+ eth_dev->data->tx_queues[q_id] = NULL;
+
+ if (nic_dev->txqs[q_id] == NULL)
+ continue;
+
+ /* stop tx queue free tx mbuf */
+ hinic_free_all_tx_skbs(nic_dev->txqs[q_id]);
+ hinic_free_tx_resources(nic_dev->txqs[q_id]);
+
+ /* free txq */
+ kfree(nic_dev->txqs[q_id]);
+ nic_dev->txqs[q_id] = NULL;
+ }
+}
+
+void hinic_free_tx_resources(struct hinic_txq *txq)
+{
+ if (txq->tx_info == NULL)
+ return;
+
+ kfree(txq->tx_info);
+ txq->tx_info = NULL;
+}
+
+void hinic_destroy_sq(struct hinic_hwdev *hwdev, u16 q_id)
+{
+ struct hinic_nic_io *nic_io;
+ struct hinic_qp *qp;
+
+ nic_io = hwdev->nic_io;
+ qp = &nic_io->qps[q_id];
+
+ if (qp->sq.wq == NULL)
+ return;
+
+ hinic_free_db_addr(nic_io->hwdev, qp->sq.db_addr);
+ hinic_wq_free(nic_io->hwdev, qp->sq.wq);
+ qp->sq.wq = NULL;
+}
diff --git a/drivers/net/hinic/hinic_pmd_tx.h b/drivers/net/hinic/hinic_pmd_tx.h
new file mode 100644
index 0000000..8b361cf
--- /dev/null
+++ b/drivers/net/hinic/hinic_pmd_tx.h
@@ -0,0 +1,143 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2017 Huawei Technologies Co., Ltd
+ */
+
+#ifndef _HINIC_PMD_TX_H_
+#define _HINIC_PMD_TX_H_
+
+#define HINIC_DEFAULT_TX_FREE_THRESH 32
+#define HINIC_MAX_TX_FREE_BULK 64
+
+#define HINIC_GET_WQ_HEAD(txq) ((txq)->wq->queue_buf_vaddr)
+
+#define HINIC_GET_WQ_TAIL(txq) \
+ ((txq)->wq->queue_buf_vaddr + (txq)->wq->wq_buf_size)
+
+#define HINIC_TX_CKSUM_OFFLOAD_MASK ( \
+ PKT_TX_IP_CKSUM | \
+ PKT_TX_TCP_CKSUM | \
+ PKT_TX_UDP_CKSUM | \
+ PKT_TX_SCTP_CKSUM | \
+ PKT_TX_OUTER_IP_CKSUM | \
+ PKT_TX_TCP_SEG)
+
+enum sq_wqe_type {
+ SQ_NORMAL_WQE = 0,
+};
+
+/* tx offload info */
+struct hinic_tx_offload_info {
+ u8 outer_l2_len;
+ u8 outer_l3_type;
+ u8 outer_l3_len;
+
+ u8 inner_l2_len;
+ u8 inner_l3_type;
+ u8 inner_l3_len;
+
+ u8 tunnel_length;
+ u8 tunnel_type;
+ u8 inner_l4_type;
+ u8 inner_l4_len;
+
+ u8 payload_offset;
+ u8 inner_l4_tcp_udp;
+};
+
+/* tx sge info */
+struct hinic_wqe_info {
+ u16 pi;
+ u16 owner;
+ u16 around;
+ u16 seq_wqebbs;
+ u16 sge_cnt;
+ u16 cpy_mbuf_cnt;
+};
+
+struct hinic_sq_ctrl {
+ u32 ctrl_fmt;
+ u32 queue_info;
+};
+
+struct hinic_sq_task {
+ u32 pkt_info0;
+ u32 pkt_info1;
+ u32 pkt_info2;
+ u32 ufo_v6_identify;
+ u32 pkt_info4;
+ u32 rsvd5;
+};
+
+struct hinic_sq_bufdesc {
+ struct hinic_sge sge;
+ u32 rsvd;
+};
+
+struct hinic_sq_wqe {
+ /* sq wqe control section */
+ struct hinic_sq_ctrl ctrl;
+
+ /* sq task control section */
+ struct hinic_sq_task task;
+
+ /* sq sge section start address, 1~127 sges */
+ struct hinic_sq_bufdesc buf_descs[0];
+};
+
+struct hinic_txq_stats {
+ u64 packets;
+ u64 bytes;
+ u64 rl_drop;
+ u64 tx_busy;
+ u64 off_errs;
+ u64 cpy_pkts;
+ u64 burst_pkts;
+};
+
+struct hinic_tx_info {
+ struct rte_mbuf *mbuf;
+ int wqebb_cnt;
+ struct rte_mbuf *cpy_mbuf;
+};
+
+struct hinic_txq {
+ /* cacheline0 */
+ struct hinic_nic_dev *nic_dev;
+ struct hinic_wq *wq;
+ struct hinic_sq *sq;
+ volatile u16 *cons_idx_addr;
+ struct hinic_tx_info *tx_info;
+
+ u16 tx_free_thresh;
+ u16 port_id;
+ u16 q_id;
+ u16 q_depth;
+ u32 cos;
+
+ /* cacheline1 */
+ struct hinic_txq_stats txq_stats;
+ u64 sq_head_addr;
+ u64 sq_bot_sge_addr;
+};
+
+int hinic_setup_tx_resources(struct hinic_txq *txq);
+
+void hinic_free_all_tx_resources(struct rte_eth_dev *eth_dev);
+
+void hinic_free_all_tx_mbuf(struct rte_eth_dev *eth_dev);
+
+void hinic_free_tx_resources(struct hinic_txq *txq);
+
+u16 hinic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, u16 nb_pkts);
+
+void hinic_free_all_tx_skbs(struct hinic_txq *txq);
+
+void hinic_txq_get_stats(struct hinic_txq *txq, struct hinic_txq_stats *stats);
+
+void hinic_txq_stats_reset(struct hinic_txq *txq);
+
+int hinic_create_sq(struct hinic_hwdev *hwdev, u16 q_id, u16 sq_depth);
+
+void hinic_destroy_sq(struct hinic_hwdev *hwdev, u16 q_id);
+
+#endif /* _HINIC_PMD_TX_H_ */
diff --git a/drivers/net/hinic/meson.build b/drivers/net/hinic/meson.build
index d1c3ecc..87c8d16 100644
--- a/drivers/net/hinic/meson.build
+++ b/drivers/net/hinic/meson.build
@@ -6,6 +6,8 @@ objs = [base_objs]
sources = files(
'hinic_pmd_ethdev.c',
+ 'hinic_pmd_rx.c',
+ 'hinic_pmd_tx.c',
)
includes += include_directories('base')