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authorKonstantin Ananyev <konstantin.ananyev@intel.com>2019-07-30 11:19:27 +0100
committerKevin Traynor <ktraynor@redhat.com>2019-09-13 10:37:20 +0100
commitea783e5d3606b7b798839cbc331838f9b422cff3 (patch)
tree8612254584da322aae6faaa8830a3a1657bd9e94
parent7f160ae926dbe9c13b9260fce88bb05eeaf9a94c (diff)
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examples/bpf: fix build
[ upstream commit 9a710863decb1cdb98efbdd5e11df3ebcfcc37b6 ] Example BPF programs t2.c, t3.c in folder examples/bpf are failing to compile with latest dpdk.org master. The reason is changes in some core DPDK header files, that causes now inclusion of x86 specific headers. To overcome the issue, minimize inclusion of DPDK header files into BPF source code. Bugzilla ID: 321 Fixes: 9dfc06c26a8b ("test/bpf: add samples") Reported-by: Michel Machado <michel@digirati.com.br> Suggested-by: Michel Machado <michel@digirati.com.br> Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
-rw-r--r--test/bpf/mbuf.h24
1 files changed, 22 insertions, 2 deletions
diff --git a/test/bpf/mbuf.h b/test/bpf/mbuf.h
index f24f908..3059e79 100644
--- a/test/bpf/mbuf.h
+++ b/test/bpf/mbuf.h
@@ -13,7 +13,6 @@
#include <stdint.h>
#include <rte_common.h>
-#include <rte_memory.h>
#ifdef __cplusplus
extern "C" {
@@ -364,6 +363,23 @@ typedef struct {
volatile int16_t cnt; /**< An internal counter value. */
} rte_atomic16_t;
+#define RTE_CACHE_LINE_MIN_SIZE 64 /**< Minimum Cache line size. */
+
+/**
+ * Force minimum cache line alignment.
+ */
+#define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)
+
+/**
+ * IO virtual address type.
+ * When the physical addressing mode (IOVA as PA) is in use,
+ * the translation from an IO virtual address (IOVA) to a physical address
+ * is a direct mapping, i.e. the same value.
+ * Otherwise, in virtual mode (IOVA as VA), an IOMMU may do the translation.
+ */
+typedef uint64_t rte_iova_t;
+#define RTE_BAD_IOVA ((rte_iova_t)-1)
+
/**
* The generic rte_mbuf, containing a packet mbuf.
*/
@@ -377,7 +393,11 @@ struct rte_mbuf {
* same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
* working on vector drivers easier.
*/
- phys_addr_t buf_physaddr __rte_aligned(sizeof(phys_addr_t));
+ RTE_STD_C11
+ union {
+ rte_iova_t buf_iova;
+ rte_iova_t buf_physaddr; /**< deprecated */
+ } __rte_aligned(sizeof(rte_iova_t));
/* next 8 bytes are initialised on RX descriptor rearm */
MARKER64 rearm_data;