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2017-04-30config: make AVX and AVX512 configurableZhihong Wang
Making AVX and AVX512 configurable is useful for performance and power testing. The similar kernel patch at https://patchwork.kernel.org/patch/9618883/. AVX512 support like in rte_memcpy has been in DPDK since 16.04, but it's still unproven in rich use cases in hardware. Therefore it's marked as experimental for now, will enable it after enough field test and possible optimization. Signed-off-by: Zhihong Wang <zhihong.wang@intel.com> Reviewed-by: Zhiyong Yang <zhiyong.yang@intel.com> Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2016-03-24mk: improve ARM NEON detectionJan Viktorin
The __ARM_NEON declares that the arm_neon.h is available which is not always true for the __ARM_NEON_FP. $ arm-linux-gnueabi-gcc -dM -E - < /dev/null | grep "_FP\|_NEON" #define __ARM_FP 12 #define __ARM_NEON_FP 4 #define __VFP_FP__ 1 $ arm-linux-gnueabi-gcc -mfpu=neon -dM -E - < /dev/null | grep "_FP\|_NEON" #define __ARM_FP 12 #define __ARM_NEON_FP 4 #define __ARM_NEON__ 1 #define __VFP_FP__ 1 #define __ARM_NEON 1 $ aarch64-linux-gnu-gcc -dM -E - < /dev/null | grep "NEON\|FP" #define __FP_FAST_FMAF 1 #define __ARM_NEON 1 #define __FP_FAST_FMA 1 $ aarch64-thunderx-linux-gnu-gcc -dM -E - < /dev/null |grep "NEON\|FP" #define __ARM_FP 12 #define __ARM_NEON_FP 12 #define __FP_FAST_FMAF 1 #define __ARM_NEON 1 #define __FP_FAST_FMA 1 Signed-off-by: Jan Viktorin <viktorin@rehivetech.com> Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2016-03-22mk: restrict CPU flags listThomas Monjalon
When compiling each file, the CPU flags are given as RTE_MACHINE_CPUFLAG_* and in the list RTE_COMPILE_TIME_CPUFLAGS. RTE_MACHINE_CPUFLAG_* are used to check the CPU features when compiling. The list RTE_COMPILE_TIME_CPUFLAGS is used only to check the CPU at runtime in the function rte_cpu_check_supported(). So it is not needed to define this list for every files. That's why RTE_COMPILE_TIME_CPUFLAGS is removed from the common variable MACHINE_CFLAGS and is added only to the CFLAGS of eal_common_cpuflags.c. Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2016-01-27mk: predefine AVX512 macro for compilerZhihong Wang
Predefine AVX512 macro if AVX512 is enabled by compiler. Signed-off-by: Zhihong Wang <zhihong.wang@intel.com>
2015-12-08mk: fix warnings when adding extra warning flagsPanu Matilainen
Starting with commit 9aa2053c6e81493b23346ff4e387903560de5c81 EXTRA_CFLAGS is sometimes being passed to the compiler without WERROR_FLAGS which can cause spurious warnings by the dozen, for example with when compiling with EXTRA_CFLAGS="-Wformat-security": cc1: warning: -Wformat-security ignored without -Wformat [-Wformat-security] Passing WERROR_FLAGS to AUTO_CPU helper makes the warning flag usage consistent throughout the codebase, silencing the warnings. Fixes: 9aa2053c6e81 ("mk: influence CPU flags with user input") Signed-off-by: Panu Matilainen <pmatilai@redhat.com> Acked-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2015-12-04mk: influence CPU flags with user inputSimon Kagstrom
We have encountered a CPU where the AES-NI instruction set is disabled due to export restrictions. Since the build machine and target machine is different, using -native configs doesn't work, and on this CPU, the application refuses to run due to the AES CPU flags being amiss. The patch passes EXTRA_CFLAGS to the figure-out-cpu-flags helper, which allows us to add -mno-aes to the compile flags and resolve this problem. Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net> Acked-by: Olivier Matz <olivier.matz@6wind.com>
2015-11-25hash: use armv8-a CRC32 instructionsJerin Jacob
armv8-a has optional CRC32 extension, march=armv8-a+crc enables code generation for the ARMv8-A architecture together with the optional CRC32 extensions. added RTE_MACHINE_CPUFLAG_CRC32 to detect the availability of CRC32 extension in compile time. At run-time, The RTE_CPUFLAG_CRC32 can be used to find the availability. armv8-a+crc target support added in GCC 4.9, Used inline assembly and emulated __ARM_FEATURE_CRC32 to work with tool-chain < 4.9 Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2015-11-18eal/arm: add CPU flags for ARMv7Vlastimil Kosar
This implementation is based on IBM POWER version of rte_cpuflags. We use software emulation of HW capability registers, because those are usually not directly accessible from userspace on ARM. Signed-off-by: Vlastimil Kosar <kosar@rehivetech.com> Signed-off-by: Jan Viktorin <viktorin@rehivetech.com> Acked-by: David Marchand <david.marchand@6wind.com>
2014-11-26eal/ppc: cpu flag checks for IBM PowerChao Zhu
IBM Power processor doesn't have CPU flag hardware registers. This patch uses aux vector software register to get CPU flags and add CPU flag checking support for IBM Power architecture. Signed-off-by: Chao Zhu <chaozhu@linux.vnet.ibm.com> Acked-by: David Marchand <david.marchand@6wind.com>
2014-06-11remove trailing whitespacesBruce Richardson
This commit removes trailing whitespace from lines in files. Almost all files are affected, as the BSD license copyright header had trailing whitespace on 4 lines in it [hence the number of files reporting 8 lines changed in the diffstat]. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> [Thomas: remove spaces before tabs in libs] [Thomas: remove more trailing spaces in non-C files] Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2014-02-25mk: rework cpu flags detectionBruce Richardson
For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>