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2017-01-19version: 17.02-rc1v17.02-rc1Thomas Monjalon
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-19bus: add probingShreyansh Jain
Bus implementations can implement a probe handler to match the devices scanned against the drivers registered. Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com> Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-19bus: add scanningShreyansh Jain
Scan for bus discovers the devices available on the bus and adds them to a bus specific device list. Each bus mandatorily implements this method. Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com> Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-19bus: introduce bus abstractionShreyansh Jain
This patch introduces the rte_bus abstraction for EAL. The model is: - One or more devices are connected to a Bus - Drivers are running instances which manage one or more devices - Bus is responsible for identifying devices (and interrupt propogation) - Driver is responsible for initializing the device This patch adds a 'rte_bus' base class which would be extended for specific implementations. It also introduces Bus registration and deregistration functions. Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com> Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-19crypto/armv8: add documentationZbigniew Bodek
Add documentation about the driver and update release notes. Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com> Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-01-19app/test: add ARMv8 crypto tests and test vectorsZbigniew Bodek
Introduce unit tests for ARMv8 crypto PMD. Add test vectors for short cases such as 160 bytes. These test cases are ARMv8 specific since the code provides different processing paths for different input data sizes. User can validate correctness of algorithms' implementation using: * cryptodev_sw_armv8_autotest For performance test one can use: * cryptodev_sw_armv8_perftest Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com> Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-01-19cryptodev: introduce ARM-specific feature flagsZbigniew Bodek
Add two new feature flags: * RTE_CRYPTODEV_FF_CPU_NEON represents ARM NEON (TM) instructions * RTE_CRYPTODEV_FF_CPU_ARM_CE represents ARM crypto extensions Add them to both cryptodev library, documentation and relevant PMD driver for ARMv8. Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com>
2017-01-19crypto/armv8: add PMD optimized for ARMv8 processorsZbigniew Bodek
This patch introduces crypto poll mode driver using ARMv8 cryptographic extensions. CPU compatibility with this driver is detected in run-time and virtual crypto device will not be created if CPU doesn't provide: AES, SHA1, SHA2 and NEON. This PMD is optimized to provide performance boost for chained crypto operations processing, such as encryption + HMAC generation, decryption + HMAC validation. In particular, cipher only or hash only operations are not provided. The driver currently supports AES-128-CBC in combination with: SHA256 HMAC and SHA1 HMAC and relies on the external armv8_crypto library: https://github.com/caviumnetworks/armv8_crypto Build ARMv8 crypto PMD if compiling for ARM64 and CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO option is enable in the configuration file. ARMV8_CRYPTO_LIB_PATH environment variable will point to the appropriate library directory. Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com> Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-01-18doc: add ZUC to crypto matricesPablo de Lara
When ZUC PMD was added, it was not added in the Crypto Device Supported Functionality Matrices. This commit adds a column in all the matrices, plus the ZUC EEA3/EIA3 algorithms. Fixes: cf7685d68f00 ("crypto/zuc: add driver for ZUC library") Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-18crypto/aesni_gcm: test new featuresPiotr Azarewicz
Added new unit tests for AES-NI GCM PMD to verify new functionalities. Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com> Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18crypto/aesni_gcm: migrate from MB library to ISA-LPiotr Azarewicz
Current Cryptodev AES-NI GCM PMD is implemented using Multi Buffer Crypto library.This patch reimplement the device using ISA-L Crypto library: https://github.com/01org/isa-l_crypto. The migration entailed the following additional support for: * GMAC algorithm. * 256-bit cipher key. * Session-less mode. * Out-of place processing * Scatter-gatter support for chained mbufs (only out-of place and destination mbuf must be contiguous) Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com> Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18app/test: fix symmetric session free in crypto perf testsArek Kusztal
This commit fixes problem with deallocation of symmetric session entries in cryptodev performance tests. Fixes: 390919829fdb ("app/test: update AES SHA performance test") Fixes: 79521c438363 ("app/test: add AES GCM performance test") Fixes: ffbe3be0d4b5 ("app/test: add libcrypto") Fixes: 97fe6461c7cb ("app/test: add SNOW 3G performance test") Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2017-01-18cryptodev: add user defined name for vdevFan Zhang
This patch adds a user defined name initializing parameter to cryptodev library. Originally, for software cryptodev PMD, the vdev name parameter is treated as the driver identifier, and will create an unique name for each device automatically, which is not necessarily as same as the vdev parameter. This patch allows the user to either create a unique name for his software cryptodev, or by default, let the system creates a unique one. This should help the user managing the created cryptodevs easily. Examples: CLI command fragment 1: --vdev "crypto_aesni_gcm_pmd" The above command will result in creating a AESNI-GCM PMD with name of "crypto_aesni_gcm_X", where postfix X is the number assigned by the system, starting from 0. This fragment can be placed in the same CLI command multiple times, resulting the postfixs incremented by one for each new device. CLI command fragment 2: --vdev "crypto_aesni_gcm_pmd,name=gcm1" The above command will result in creating a AESNI-GCM PMD with name of "gcm1". This fragment can be placed in the same CLI command multiple times, as long as each having a unique name value. Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18crypto/qat: add scatter gather to feature flagsArek Kusztal
This commit adds scatter gather option to Intel(R) QuickAssist Technology driver feature flags. Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18examples/ipsec-secgw: support SHA256 HMACZbigniew Bodek
Add minor adjustments to support SHA256 HMAC: - extend maximum key length to match SHA256 HMAC - add SHA256 HMAC parameters and configuration string - add SHA256 HMAC to inbound and outbound cases Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com> Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2017-01-18app/test: check scatter-gather for crypto driversTomasz Kulasek
This patch provides unit tests for set of cipher/hash combinations covering currently implemented crypto PMD's and allowing to verify scatter gather support. Signed-off-by: Daniel Mrzyglod <danielx.t.mrzyglod@intel.com> Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com> Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18crypto/openssl: support scatter-gatherTomasz Kulasek
Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com> Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18crypto: support scatter-gather in software driversTomasz Kulasek
This patch introduces RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER feature flag informing that selected crypto device supports segmented mbufs natively and doesn't need to be coalesced before crypto operation. While using segmented buffers in crypto devices may have unpredictable results, for PMDs which doesn't support it natively, additional check is made for debug compilation. Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com> Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18crypto/openssl: fix indentation in guideDaniel Mrzyglod
The code section was lacking indentation to be be correctly formatted. Fixes: d61f70b4c918 ("crypto/libcrypto: add driver for OpenSSL library") Signed-off-by: Daniel Mrzyglod <danielx.t.mrzyglod@intel.com> Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-18cryptodev: fix loop in device queryFan Zhang
This patch fixes the dev value update problem in rte_cryptodev_pmd_get_named_dev, orginally, dev won't be updated after the initial step in the loop. Fixes: d11b0f30df88 ("cryptodev: introduce API and framework for crypto devices") Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18crypto/openssl: remove unneeded checkPiotr Azarewicz
EVP_CIPHER_CTX_set_padding() function always returns 1, so the check is unneeded. Fixes: d61f70b4c918 ("crypto/libcrypto: add driver for OpenSSL library") Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com> Tested-by: Zhaoyan Chen <zhaoyan.chen@intel.com> Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18app/test: add integrity check for crypto mbuf dataFiona Trahe
In block cipher test cases, add checks that the source and destination mbufs are not modified except where expected. Signed-off-by: Fiona Trahe <fiona.trahe@intel.com> Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2017-01-18crypto/qat: fix IV size in capabilitiesArek Kusztal
This patch sets iv size in qat PMD to 12 bytes to be conformant with nist SP800-38D. Fixes: 26c2e4ad5ad4 ("cryptodev: add capabilities discovery") Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18crypto/aesni_gcm: fix IV size in capabilitiesArek Kusztal
This patch sets iv size in aesni gcm PMD to 12 bytes to be conformant with nist SP800-38D. Fixes: eec136f3c54f ("aesni_gcm: add driver for AES-GCM crypto operations") Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
2017-01-18crypto/aesni_gcm: fix J0 padding bytesArek Kusztal
This commit fixes pre-counter block (J0) padding by clearing four most significant bytes before setting initial counter value. Fixes: b2bb3597470c ("crypto/aesni_gcm: move pre-counter block to driver") Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
2017-01-18crypto/aesni_mb: support AVX512Declan Doherty
Release v0.44 of Intel(R) Multi-Buffer Crypto for IPsec library adds support for AVX512 instructions. This patch enables the new AVX512 accelerated functions from the aesni_mb_pmd crypto poll mode driver. This patch set requires that the aesni_mb_pmd is linked against the version 0.44 or greater of the Multi-Buffer Crypto for IPsec library. Signed-off-by: Declan Doherty <declan.doherty@intel.com> Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-18crypto/aesni_mb: add missing supported algos in guidePablo de Lara
AESNI MB PMD supports SHA224-HMAC and SHA384-HMAC, but the documentation was not updated with this. Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: John McNamara <john.mcnamara@intel.com>
2017-01-18crypto/aesni_mb: add single operation functionalityPablo de Lara
Update driver to use new AESNI Multibuffer IPSec library single operation functionality (cipher only and authentication only). This patch also adds tests for this new feature. Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18crypto/aesni_mb: update dependency in guidePablo de Lara
The Intel(R) Multi Buffer Crypto library used in the AESNI MB PMD has been moved to a new repository, in github. This patch updates the link where it can be downloaded. Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: John McNamara <john.mcnamara@intel.com>
2017-01-18crypto/aesni_mb: fix incorrect crypto sessionPablo de Lara
When using sessionless crypto operations, crypto session is obtained from a pool of sessions, when processing the operation. Once the operation is processed, the session is put back in the pool, but for the AESNI MB PMD, this session was not being saved in the operation and therefore, it did not return to the session pool. Fixes: 924e84f87306 ("aesni_mb: add driver for multi buffer based crypto") Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18app/test: check SGL on QATArek Kusztal
This commit adds GCM tests to use within scatter-gather list. Test use direct chained mbufs created based on the input parameter for max size for in place operations and out of place operations. Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18crypto/qat: add SGL capabilityArek Kusztal
This commit adds scatter-gather list capability to Intel QuickAssist Technology driver. Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18app/test: check DES on QATArek Kusztal
This commit adds tests of Data Encryption Standard (DES) algorithm to Intel QuickAssist technology crypto test suites Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18crypto/qat: add DES capabilityArek Kusztal
This commit adds DES capability to Intel QuickAssist Technology Driver Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18cryptodev: add DES CBC cipher algorithmArek Kusztal
This commit adds DES CBC ciper algorithm to available algorithms Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18crypto/openssl: fix extra bytes written at end of dataPiotr Azarewicz
Extra bytes are being written at end of data while process standard openssl cipher encryption. This behaviour is unexpected. This patch disable the padding feature in openssl library, which is causing the problem. Fixes: d61f70b4c918 ("crypto/libcrypto: add driver for OpenSSL library") Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com> Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-18crypto/qat: fix buffer overwrite in OOP caseFiona Trahe
In out-of-place operation, data is DMAed from source mbuf to destination mbuf. To avoid header data in dest mbuf being overwritten, the minimal data-set should be DMAed. Fixes: 39e0bee48e81 ("crypto/qat: rework request builder for performance") Signed-off-by: Fiona Trahe <fiona.trahe@intel.com> Acked-by: John Griffin <john.griffin@intel.com>
2017-01-18cryptodev: fix crash on null dereferenceJerin Jacob
crypodev->data->name will be null when rte_cryptodev_get_dev_id() invoked without a valid crypto device instance. Fixes: d11b0f30df88 ("cryptodev: introduce API and framework for crypto devices") Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2017-01-18app/test: check AES cipher-only on QATFiona Trahe
Extended functional AES-CBC and AES-CTR cipher-only tests to run on QAT PMD. Added AES_CBC cipher-only performance tests on QAT PMD. No driver changes, but as now tested, QAT documentation is updated to remove constraint. Signed-off-by: Fiona Trahe <fiona.trahe@intel.com> Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2017-01-18cryptodev: remove unused digest-appended featureFiona Trahe
The cryptodev API had specified that if the digest address field was left empty on an authentication operation, then the PMD would assume the digest was appended to the source or destination data. This case was not handled at all by most PMDs and incorrectly handled by the QAT PMD. As no bugs were raised, it is assumed to be not needed, so this patch removes it, rather than add handling for the case on all PMDs. The digest can still be appended to the data, but its address must now be provided in the op. Signed-off-by: Fiona Trahe <fiona.trahe@intel.com> Acked-by: John Griffin <john.griffin@intel.com>
2017-01-18doc: add flow distributor example guidePablo de Lara
Signed-off-by: Sameh Gobriel <sameh.gobriel@intel.com> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: Christian Maciocco <christian.maciocco@intel.com>
2017-01-18doc: add EFD library section in programmers guidePablo de Lara
Signed-off-by: Sameh Gobriel <sameh.gobriel@intel.com> Acked-by: Christian Maciocco <christian.maciocco@intel.com>
2017-01-18examples/flow_distributor: new example to demonstrate EFDPablo de Lara
This new sample app, based on the client/server sample app, shows the user an scenario using the EFD library. It consists of: - A front-end server which has an EFD table that stores the node id for each flow key, which will distribute the incoming packets to the different nodes - A back-end node, which has a hash table where node checks, after reading packets coming from the server, whether the packet is meant to be used in such node, in which case it will be TXed, or not, in which case, packet will be dropped. Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Signed-off-by: Saikrishna Edupuganti <saikrishna.edupuganti@intel.com> Acked-by: Christian Maciocco <christian.maciocco@intel.com>
2017-01-18app/test: add EFD functional and perf testsPablo de Lara
Signed-off-by: Byron Marohn <byron.marohn@intel.com> Signed-off-by: Karla Saur <karla.saur@intel.com> Signed-off-by: Saikrishna Edupuganti <saikrishna.edupuganti@intel.com> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: Christian Maciocco <christian.maciocco@intel.com>
2017-01-18efd: add AVX2 vector lookup functionPablo de Lara
Signed-off-by: Byron Marohn <byron.marohn@intel.com> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Signed-off-by: Saikrishna Edupuganti <saikrishna.edupuganti@intel.com> Acked-by: Christian Maciocco <christian.maciocco@intel.com>
2017-01-18efd: new Elastic Flow Distributor libraryPablo de Lara
Elastic Flow Distributor (EFD) is a distributor library that uses perfect hashing to determine a target/value for a given incoming flow key. It has the following advantages: - First, because it uses perfect hashing, it does not store the key itself and hence lookup performance is not dependent on the key size. - Second, the target/value can be any arbitrary value hence the system designer and/or operator can better optimize service rates and inter-cluster network traffic locating. - Third, since the storage requirement is much smaller than a hash-based flow table (i.e. better fit for CPU cache), EFD can scale to millions of flow keys. Finally, with current optimized library implementation performance is fully scalable with number of CPU cores. Signed-off-by: Byron Marohn <byron.marohn@intel.com> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Signed-off-by: Saikrishna Edupuganti <saikrishna.edupuganti@intel.com> Acked-by: Christian Maciocco <christian.maciocco@intel.com>
2017-01-18crypto/qat: use I/O device memory read/write APISantosh Shukla
Replace the raw I/O device memory read/write access with eal abstraction for I/O device memory read/write access to fix portability issues across different architectures. CC: John Griffin <john.griffin@intel.com> CC: Fiona Trahe <fiona.trahe@intel.com> CC: Deepak Kumar Jain <deepak.k.jain@intel.com> Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-01-18net/vmxnet3: use I/O device memory read/write APISantosh Shukla
Replace the raw I/O device memory read/write access with eal abstraction for I/O device memory read/write access to fix portability issues across different architectures. CC: Yong Wang <yongwang@vmware.com> Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-01-18net/virtio: use I/O device memory read/write APISantosh Shukla
Replace the raw I/O device memory read/write access with eal abstraction for I/O device memory read/write access to fix portability issues across different architectures. Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Acked-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2017-01-18net/thunderx: use I/O device memory read/write APIJerin Jacob
Replace the raw I/O device memory read/write access with eal abstraction for I/O device memory read/write access to fix portability issues across different architectures. Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>