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authorHemant Agrawal <hemant.agrawal@nxp.com>2017-04-11 19:12:39 +0530
committerFerruh Yigit <ferruh.yigit@intel.com>2017-04-19 15:37:37 +0200
commit5dc43d22b5ad8f4f4391398efd8c61db353215d1 (patch)
treedc65869ca7b48205dc6442111f03546916622dfd /config
parenta0d5c9caf0f131c3f76e8de6ba29060230593cab (diff)
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mempool/dpaa2: add hardware offloaded mempool
DPAA2 Hardware Mempool handlers allow enqueue/dequeue from NXP's QBMAN hardware block. CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS is set to 'dpaa2', if the pool is enabled. This memory pool currently supports packet mbuf type blocks only. Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Diffstat (limited to 'config')
-rw-r--r--config/common_base5
-rw-r--r--config/defconfig_arm64-dpaa2-linuxapp-gcc8
2 files changed, 13 insertions, 0 deletions
diff --git a/config/common_base b/config/common_base
index 94f1a60..ab0750b 100644
--- a/config/common_base
+++ b/config/common_base
@@ -304,6 +304,11 @@ CONFIG_RTE_LIBRTE_LIO_DEBUG_REGS=n
CONFIG_RTE_LIBRTE_FSLMC_BUS=n
#
+# Compile Support Libraries for NXP DPAA2
+#
+CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=n
+
+#
# Compile burst-oriented VIRTIO PMD driver
#
CONFIG_RTE_LIBRTE_VIRTIO_PMD=y
diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc
index 365ae5a..0c280d8 100644
--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
@@ -42,6 +42,14 @@ CONFIG_RTE_ARCH_ARM_TUNE="cortex-a57+fp+simd"
CONFIG_RTE_MAX_LCORE=8
CONFIG_RTE_MAX_NUMA_NODES=1
+CONFIG_RTE_PKTMBUF_HEADROOM=256
+
+#
+# Compile Support Libraries for DPAA2
+#
+CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=y
+CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="dpaa2"
+
#
# Compile NXP DPAA2 FSL-MC Bus
#