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authorMatan Azrad <matan@mellanox.com>2019-05-30 10:20:34 +0000
committerFerruh Yigit <ferruh.yigit@intel.com>2019-06-14 00:01:06 +0900
commit6cfb15300607fd74669cb66f77f418755b80c86f (patch)
tree077c5578072dd750082ce145b9d1649769f1d441
parent15b0ea00535d4e164891168ef628b112ae049e06 (diff)
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net/mlx5: mitigate Rx doorbell memory barrier
The RQ WQEs must be written in the memory before the HW gets the RQ doorbell, hence a memory barrier should be triggered after the WQEs writing and before the doorbell writing. The current code used rte_wmb barrier which ensures that all the memory stores were done while it is enough to use rte_cio_wmb barrier for the local memory stores because the WQEs are in local memory. CC: stable@dpdk.org Signed-off-by: Matan Azrad <matan@mellanox.com> Acked-by: Shahaf Shuler <shahafs@mellanox.com>
-rw-r--r--drivers/net/mlx5/mlx5_rxq.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 1ac4020..07adeb5 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -1076,7 +1076,7 @@ mlx5_rxq_ibv_new(struct rte_eth_dev *dev, uint16_t idx)
rxq_data->decompressed = 0;
/* Update doorbell counter. */
rxq_data->rq_ci = wqe_n >> rxq_data->sges_n;
- rte_wmb();
+ rte_cio_wmb();
*rxq_data->rq_db = rte_cpu_to_be_32(rxq_data->rq_ci);
DRV_LOG(DEBUG, "port %u rxq %u updated with %p", dev->data->port_id,
idx, (void *)&tmpl);