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authorJerin Jacob <jerin.jacob@caviumnetworks.com>2017-01-18 06:51:15 +0530
committerThomas Monjalon <thomas.monjalon@6wind.com>2017-01-18 16:57:11 +0100
commite8025211711a08257c4731a69bb5624d7de6d7c6 (patch)
tree4be6fc83cc9895d59f8299bf80bb031956cefe79
parent1ea155733e33716fd7275f9c361ee8c20224df7d (diff)
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eal/x86: define I/O device memory barriers
The patch does not provide any functional change for IA. I/O barriers are mapped to existing smp barriers. CC: Bruce Richardson <bruce.richardson@intel.com> CC: Konstantin Ananyev <konstantin.ananyev@intel.com> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
-rw-r--r--lib/librte_eal/common/include/arch/x86/rte_atomic.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/librte_eal/common/include/arch/x86/rte_atomic.h b/lib/librte_eal/common/include/arch/x86/rte_atomic.h
index 00b1cdf..4eac666 100644
--- a/lib/librte_eal/common/include/arch/x86/rte_atomic.h
+++ b/lib/librte_eal/common/include/arch/x86/rte_atomic.h
@@ -61,6 +61,12 @@ extern "C" {
#define rte_smp_rmb() rte_compiler_barrier()
+#define rte_io_mb() rte_mb()
+
+#define rte_io_wmb() rte_compiler_barrier()
+
+#define rte_io_rmb() rte_compiler_barrier()
+
/*------------------------- 16 bit atomic operations -------------------------*/
#ifndef RTE_FORCE_INTRINSICS