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authorJerin Jacob <jerin.jacob@caviumnetworks.com>2017-01-18 06:51:14 +0530
committerThomas Monjalon <thomas.monjalon@6wind.com>2017-01-18 16:57:11 +0100
commit1ea155733e33716fd7275f9c361ee8c20224df7d (patch)
tree8bf769e3d0e1a1864e04662b0e7bdbdcc2a4fe9c
parent92fdc2327755f334ca2c9beb1fa51481c6b07062 (diff)
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eal: introduce I/O device memory barriers
This commit introduce rte_io_mb(), rte_io_wmb() and rte_io_rmb(), in order to enable memory barriers between I/O device and CPU. Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
-rw-r--r--lib/librte_eal/common/include/generic/rte_atomic.h27
1 files changed, 27 insertions, 0 deletions
diff --git a/lib/librte_eal/common/include/generic/rte_atomic.h b/lib/librte_eal/common/include/generic/rte_atomic.h
index 43a704e..7b81705 100644
--- a/lib/librte_eal/common/include/generic/rte_atomic.h
+++ b/lib/librte_eal/common/include/generic/rte_atomic.h
@@ -100,6 +100,33 @@ static inline void rte_smp_wmb(void);
*/
static inline void rte_smp_rmb(void);
+/**
+ * General memory barrier for I/O device
+ *
+ * Guarantees that the LOAD and STORE operations that precede the
+ * rte_io_mb() call are visible to I/O device or CPU before the
+ * LOAD and STORE operations that follow it.
+ */
+static inline void rte_io_mb(void);
+
+/**
+ * Write memory barrier for I/O device
+ *
+ * Guarantees that the STORE operations that precede the
+ * rte_io_wmb() call are visible to I/O device before the STORE
+ * operations that follow it.
+ */
+static inline void rte_io_wmb(void);
+
+/**
+ * Read memory barrier for IO device
+ *
+ * Guarantees that the LOAD operations on I/O device that precede the
+ * rte_io_rmb() call are visible to CPU before the LOAD
+ * operations that follow it.
+ */
+static inline void rte_io_rmb(void);
+
#endif /* __DOXYGEN__ */
/**