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authorViacheslav Ovsiienko <viacheslavo@mellanox.com>2019-08-05 13:03:50 +0000
committerRaslan Darawsheh <rasland@mellanox.com>2019-08-06 17:42:12 +0200
commit7014ef5bbab879923e4dfb801d493a8acd756c4a (patch)
treef06ee65e4fe6b9bbc019581d4823017b96c0d2b1
parent614de6c898aa938b3ec8c9991bec0bfdebc31545 (diff)
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net/mlx5: fix inline data length assert
The debug assert wrongly triggers on the inline data 18B, this should be passed successfully. Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template") Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com>
-rw-r--r--drivers/net/mlx5/mlx5_rxtx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 8acd8cd..534a044 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -2594,7 +2594,7 @@ mlx5_tx_eseg_mdat(struct mlx5_txq_data *restrict txq,
sizeof(struct rte_vlan_hdr) +
2 * RTE_ETHER_ADDR_LEN),
"invalid Ethernet Segment data size");
- assert(inlen > MLX5_ESEG_MIN_INLINE_SIZE);
+ assert(inlen >= MLX5_ESEG_MIN_INLINE_SIZE);
es->inline_hdr_sz = rte_cpu_to_be_16(inlen);
pdst = (uint8_t *)&es->inline_data;
if (MLX5_TXOFF_CONFIG(VLAN) && vlan) {